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58 条记录 (耗时 0.022 秒)

    Velocity error control apparatus
    1.
    发明授权
    Velocity error control apparatus 失效
    速度误差控制装置

    公开(公告)号：US4165524A

    公开(公告)日：1979-08-21

    申请号：US911286

    申请日：1978-05-31

    申请人： Takeshi Ninomiya

    发明人： Takeshi Ninomiya

    IPC分类号： H04N5/956 ,  G11B20/02 ,  H04N5/783 ,  H04N5/921 ,  H04N9/885 ,  H04N9/896 ,  H04N5/78

    CPC分类号： H04N9/896 ,  H04N5/783 ,  H04N5/921 ,  H04N9/885

    摘要： Velocity error control apparatus for use in a video signal time base corrector of the type including a main memory having addressable storage locations for storing successive lines of video signals, write-in circuitry including a write-in clock signal generator synchronized with time base errors in the video signal for writing successive lines of video signals into addressed storage locations at a write-in clock signal rate, and read-out circuitry including a controllable read-out clock signal generator for reading out successive lines of video signals from addressed storage locations at a substantially constant read-out clock rate. The velocity error control apparatus includes a velocity error detector for detecting velocity errors in successive lines of the video signals which are written into the main memory. A velocity error store has a plurality of storage locations, each being operative to store a velocity error signal representing the velocity error of an associated line of video signals, and a velocity error read-out circuit reads out the velocity error signal from the velocity error store, which velocity error signal is associated with a line of video signals when the associated line of video signals is read out from the main memory. A modifying circuit modifies the read out velocity error signal as a function of at least one velocity error signal which is associated with at least one adjacent line of video signals. The modified velocity error signal is used to modulate the read-out clock signals so as to compensate for the velocity errors in successive lines of video signals.

    摘要翻译： 一种用于视频信号时基校正器的速度误差控制装置，包括具有用于存储连续视频信号线的可寻址存储位置的主存储器，包括与时基误差同步的写入时钟信号发生器的写入电路 用于以写入时钟信号速率将连续的视频信号线写入寻址的存储位置的视频信号，以及包括可读读出时钟信号发生器的读出电路，用于从 基本上恒定的读出时钟速率。 速度误差控制装置包括用于检测写入主存储器的视频信号的连续行中的速度误差的速度误差检测器。 速度误差存储具有多个存储位置，每个存储位置可操作以存储表示相关行视频信号的速度误差的速度误差信号，并且速度误差读出电路从速度误差读出速度误差信号 存储，当从主存储器读出相关行的视频信号时，该速度误差信号与视频信号线相关联。 修改电路将读出的速度误差信号修改为与至少一个相邻的视频信号线相关联的至少一个速度误差信号的函数。 修改的速度误差信号用于调制读出的时钟信号，以便补偿连续的视频信号行中的速度误差。

    Offset carrier recording system & method
    2.
    发明授权
    Offset carrier recording system & method 失效
    偏移载体记录系统和方法

    公开(公告)号：US3806638A

    公开(公告)日：1974-04-23

    申请号：US15628771

    申请日：1971-06-24

    申请人： ITT RESEARCH INSTITUTE

    发明人： CAMRAS M

    IPC分类号： H04N5/775 ,  H04N5/92 ,  H04N5/921 ,  H04N17/06 ,  H04B1/20 ,  H04B1/26 ,  H04N5/78

    CPC分类号： H04N5/9204 ,  H04N5/775 ,  H04N5/92 ,  H04N5/921 ,  H04N17/06

    摘要： An offset carrier longitudinal scan recording and reproducing system for television signals wherein an amplitude modulated video signal is derived from a television receiver and converted to an offset carrier with a full upper sideband and an attenuated vestigial lower sideband. A direct or offset carrier audio signal may be recorded on the same channel with the offset carrier video signal. During monitoring and playback, the offset carrier is heterodyned to a television broadcast frequency or intermediate frequency and coupled into the television receiver. The same receiver may simultaneously supply video I.F. and audio F.M. signals for recording, and monitor offset carrier audio and video signals supplied to the recording head to facilitate recording adjustments.

    摘要翻译： 一种用于电视信号的偏移载波纵向扫描记录和再现系统，其中调幅视频信号从电视接收机导出并转换为具有全上边带和衰减的残留下边带的偏移载波。 直接或偏移的载波音频信号可以用偏移载波视频信号记录在同一信道上。 在监视和重放期间，偏移载波被外差到电视广播频率或中频，并被耦合到电视接收机中。 相同的接收机可以同时提供视频I.F. 和音频F.M. 用于记录的信号，以及监视提供给记录头的偏移载波音频和视频信号以便于记录调整。

    Imaging device
    10.
    发明授权
    Imaging device 有权

    公开(公告)号：US11503245B2

    公开(公告)日：2022-11-15

    申请号：US16925692

    申请日：2020-07-10

    申请人： Panasonic Intellectual Property Management Co., Ltd.

    发明人： Mitsuo Abe

    IPC分类号： H04N5/76 ,  H04N5/921 ,  H04N5/77 ,  H04N5/232

    摘要： The controller of a digital camera executes copying of image data between memory cards loaded in the digital camera. The controller stores target medium information in a memory. The target medium information indicates, among the loaded memory cards, a memory card in which image data is recorded last or a memory card from which image data is read last. Based on the target medium information, the controller sets a copy direction. The copy direction indicates, among the loaded memory cards, a copy source memory card and a copy destination memory card.