Method of fabrication of anti-fuse integrated with dual damascene process
    1.
    发明授权
    Method of fabrication of anti-fuse integrated with dual damascene process 有权
    与双镶嵌工艺集成的抗熔丝的制造方法

    公开(公告)号:US6124194A

    公开(公告)日:2000-09-26

    申请号:US439365

    申请日:1999-11-15

    摘要: A method of fabricating an anti-fuse module and dual damascene interconnect structure comprises the following steps. A semiconductor structure having at least two exposed metal lines covered by a first dielectric layer is provided. A first metal line is within an anti-fuse area and a second metal line is within an interconnect area. A first metal via is formed within the first dielectric layer within the anti-fuse area with the first metal via contacting the first metal line. A SiN layer is deposited over the first dielectric layer and the first metal via. The SiN layer is patterned to form at least two openings. A first opening exposes the first metal via, and a second opening exposes a portion of the first dielectric layer above the second metal line. A fusing element layer is deposited and patterned over the patterned SiN layered structure to form a fusing element over the first metal via. Simultaneously, an anti-fuse metal line is formed over the fusing element to form an anti-fuse module within the anti-fuse area, and a dual damascene interconnect is formed over, and contacting with, the second metal line and within the interconnect area.

    摘要翻译: 一种制造抗熔丝模块和双镶嵌互连结构的方法包括以下步骤。 提供具有被第一介电层覆盖的至少两个暴露的金属线的半导体结构。 第一金属线在反熔丝区内,第二金属线在互连区内。 第一金属通孔形成在反熔丝区域内的第一电介质层内,第一金属通孔接触第一金属线。 在第一介电层和第一金属通孔上沉积SiN层。 图案化SiN层以形成至少两个开口。 第一开口暴露第一金属通孔,第二开口暴露第二电介质层的第二金属线上方的一部分。 在图案化的SiN层状结构上沉积并图案化定影元件层,以在第一金属通孔之上形成定影元件。 同时,在熔断元件上方形成抗熔丝金属线,以在反熔丝区域内形成反熔丝模块,并且在第二金属线之间和互连区内形成双面镶嵌互连 。