Abstract:
Procédé de traitement comparatif sécurisé du type dans lequel un processeur d'un composant électronique compare des données d'épreuve (EPR, AUTH) qu'il reçoit en entrée à des données secrètes principales (CTRL, PIN) stockées dans ledit composant électronique, caractérisé en ce que le processeur met en œuvre, en plus de la comparaison aux données secrètes (CTRL, PIN), des opérations complémentaires sur les données d'épreuve (EPR, AUTH) qui génèrent sur le composant électronique une variation de comportement qui est fonction des données d'épreuve (EPR, AUTH) qu'il reçoit en entrée et qui s'ajoute à la variation de comportement liée à la comparaison aux données secrètes principales (CTRL, PIN).
Abstract:
Systems, methods, computer readable media and articles of manufacture consistent with innovations herein are directed to computer virtualization, computer security and/or data isolation. According to some illustrative implementations, innovations herein may utilize and/or involve a separation kernel hypervisor which may include the use of a guest operating system virtual machine protection domain, a virtualization assistance layer, and/or a rootkit defense mechanism (which may be proximate in temporal and/or spatial locality to malicious code, but isolated from it), inter alia, for detection and/or prevention of malicious code, for example, in a manner/context that is isolated and not able to be corrupted, detected, prevented, bypassed, and/or otherwise affected by the malicious code.
Abstract:
Verfahren zum Codieren eines Datenwortes (D1) mit einer vorgegebenen Anzahl von Zufallsdatensymbolen (ZD) und einer vorgegebenen Anzahl von Nutzdatensymbole (ND), wobei zu dem Datenwort (D1) eine Prüfsumme mit einer vorgegebene Anzahl von Prüfsymbolen (PS) berechnet wird und die Anzahl der Zufallsdatensymbole (ZD) mindestens der Anzahl der Prüfsymbole (PS) der Prüfsumme entspricht.
Abstract:
Systems, methods and program products for a first central processing unit (CPU) configured to perform tasks that do not require manipulation of sensitive information and a second CPU that is configured to perform tasks that manipulate the sensitive information on behalf of the first CPU. The first CPU and the second CPU can communicate through a secure interface. The first CPU cannot access the sensitive information within the second CPU.
Abstract:
A controller for an event-based statistical covert channel includes a data receiver; a data transmitter; and a channel controller that includes a fixed distribution randomized event buffer construction processor (FDREBCP) and a fixed distribution randomized event buffer (FDREB). The FDREBCP holds event distribution data that define one or more fixed distributions that the FDREBCP employs to fill the FDREB, whereby the event distribution data is stored during the occurrence of the event, subsequently removed from the FDREB and reordered, and a dummy event distribution data created to prevent an unauthorized outsider modulating the timing of events by alternatively causing and not causing the event.
Abstract:
Un procédé de protection d'un programme interprété par une machine virtuelle comprend l'insertion d'opérations de brouillage pendant l'exécution de chaque instruction du programme. Les opérations de brouillage sont sélectionnées en fonction d'un condensé du programme, de façon à varier lorsque qu'une même instruction appartient à deux programmes différents. De cette façon, toute tentative d'ingénierie inverse effectuée à partir de canaux cachés est rendue impossible.
Abstract:
The present invention describes a method for providing comprehensive protection against leakage of sensitive information assets from the enterprise, using host based agents, content meta-data and rules-based policies. The invention relates to the field of Host-based Information Leakage Detection and Prevention Systems (HILDP). The system protects information sent out via physical devices (such as printers and USB flash drives and others)(140). The primary distinguishing feature from prior art information leakage systems is association of meta-data to content and preservation of such meta-data through transmission and transformation of information assets. The content tracking mechanism allows the propagation of sensitive content inside the organization (140) while allowing the system to prevent attempts to send it outside the organization (140).
Abstract:
The invention relates to a method of implementing an interpreter language firewall into a smart card controller, where program code and program data are located in defined memory areas (2, 3 and 4) and a first program code is needed to be able to access the memory area of a second program code or data and the program code is executed by the use of an interpreter by mapping the interpreter (1.1) in the defined memory areas (2, 3 and 4) of the first program code and the second program code.
Abstract:
The invention concerns a self-unpredictable microprocessor or microcomputer, comprising a processor (1), a first working memory (51), a main memory (6) containing an operation system, a main programme (P1) and a secondary programme (P2), characterised in that it further comprises: a second working memory (52); switching means enabling, during the execution of programmes, to switch the working memory function to one of its two working memories (51, 52) while preserving their contents; said switching means comprising at least a block of registers (54) for memorising the context of the programme process flow in the main memory and a switching circuit (53) for validating one of the working memories and access registers (A1-A3), (D1-D3) associated with each memory (51, 52, 6) and controlled by said switching circuit (53).