Abstract:
An emitter follower circuit has series circuits, each consisting of an emitter follower transistor (Q3, Q4), a current source, and a current source resistor connected to the emitter side of the emitter follower transistor (Q3, Q4). The source resistors are MOS transistors (N4, N5), which are switched on and off by control signals so that they have conduction and cutoff states. Between the source and the drain of each MOS transistors (N4, N5), current path means (R1, R2) is provided which has a resistance greater than the on-resistance of the MOS transistors to permit a very small current to flow, at least when said MOS transistors are rendered nonconductive.
Abstract:
A system and method of positioning the head in a memory wherein a control circuit such as a microprocessor unit that is used for positioning the head is lightened of load while keeping the increase in speed and precision of head positioning, so that higher-speed operation of the head and/or the increase in recording density of the recording medium are attained with the help of a low-price control circuit. The control system has track cross pulse generator means (54, 55, 282, 283) that produces either an odd-number or an even-number track cross pulses (PODD or PEVEN) based upon the positional data that indicates that the head crosses the tracks of the recording medium. The control circuit (22) (a) sets the track cross pulse generator means, before the speed control is started, in such a manner that said track cross pulse generator means produces track cross pulses of an odd number when there are an even number of desired tracks and produces track cross pulses of an odd number when there are an odd number of desired tracks, and then controls the speed of the head-drive actuator so that the head is positioned on a desired track, (b) updates the remainder of track movement (DIFF), when the first track cross pulse is input, depending upon a difference between the track position of the head before the speed control is started and a desired track position, and (c) reduces the remainder of track movement by two tracks every time a track cross pulse is received thereafter. Thus, the track cross pulse generator means sends to the control circuit an odd number or an even number of track cross pulses that indicate a desired track after every two tracks.
Abstract:
In a highly densely packaged electronic equipment, the mounting structure enables the electric power to be supplied from the power source to a printed-circuit board through a minimum distance without any voltage drop, and enables the power source and the printed-circuit board to be stably cooled by a common cooling fan, wherein the power source, a bus plate and the printed-circuit board are integrally assembled and connected together in a unitary structure.
Abstract:
Wiring structure of a terminal circuit (1), wherein the terminal circuit (1) is connected to an integrated circuit (2) via a fixed wiring pattern (8) formed in an outgoing layer (12) which is closest to a part-mounting surface (14).
Abstract:
The following two address registers are provided independently of each other; an instruction address register unit I for reading out instructions, and an instruction address register unit II for indicating the address of an instruction being executed in a pipeline. The address of a branch instruction is held in the instruction address register unit II until the instruction has left the pipeline. The arrangement is such that it is possible to renew the contents of the instruction address register unit I at the moment when the route to be taken is determined according to the branch instruction, thereby minimizing delays involved in the operation of reading out the 8-bite previous instruction at the branch destination.
Abstract:
After a transmitter transmits training signals (TR1, TR10, TR11) of lengths corresponding to its own channels and information (i) representing the length of each signal, it transmits a data signal (data), and a receiver trains itself with the received training signals (TR1, TR10, TR11), detects a switching time point between the signal (TR1, TR10, TR11) and the data signal (data) using the length information (i), to train the data receiver by the training signal of the optimum length.
Abstract:
An improved method and apparatus for recognizing, classifying and processing frames (58) received at a frame processor (10) in a computer network is disclosed. Following receipt of a frame (58) at an input port (14) of a frame processor (10), source and destination addresses are parsed from the frame (58). A plurality of lookup tables (130) are provided in a memory (102), each of which contains a search field (132) and a classification key field (146). Sources or destination addresses are stored in the respective search fields (132) along with other information associated with frame and a compact classification key is stored in the corresponding classification key field (146). Searches are performed of the respective search fields (132) within the respective lookup tables (130) to determine whether a match exists between each of the destination and source addresses and other information and the search field (132) within the lookup tables (130). In the event the searches yield a match, classification keys (146) associated with each respective addresses are retrieved and concatenated.
Abstract:
A device for processing a medium which is suitable for processing slips and documents in, for example, financial organs. A medium processing device (30) which recognizes information based on an image (19) read from a medium on which the information is recorded in an arbitrary format is provided with a means (2) which extracts the feature of the medium including the format from the image data (19) and specifies the position at which the information to be recognized is recorded from the feature and an image recognizing means (3) which recognizes the information by recognizing the image (19) at the position specified by the means (2). The device (30) processes documents and slips such as privately issued slips having various formats.
Abstract:
Deterioration of transparent conductive films constituting display electrodes is prevented and the reliability of display is improved. An AC in-plane discharge plasma display panel is provided with a plurality of display elecdtrodes X and Y each of which has a multilayer structure comprising a transparent conductive film or a metallic film having a width narrower than that of the conductive film and a dielectric layer covering the electrodes X and Y from the discharging space. The dielectric layer is made of ZnO glass material substantially containing no lead. The dielectric layer covers up to the ends of the display electrodes and protect them. The dielectric layer is etched off in a succeeding process.
Abstract:
A gas reactor (10) comprises first and second gas inlets (32, 34), a gas outlet (36), a rotatable plate (22), and a stationary plate (20) disposed facing the rotatable plate with a gap (24) between these plates. Catalysts (26, 28) are carried by the rotatable plate and the stationary plate which are connected to a power supply to generate plasma (30) at the gap (24). A chemical reaction is carried out at the gap by the catalysts and the plasma, and is promoted by virtue of a gas flow being disturbed by the rotatable plate. In this manner, a first gas flows into the gap (24) through the first gas inlet (32) to be activated at the gap. A second gas is supplied to a downstream side of the gap (24) through the second gas inlet (34) to be mixed with the activated first gas for further reaction. In place of the gas reactor using the rotatable plate, a gas reactor can be constituted as a fan-type one.