公开(公告)号：WO2013077891A1

公开(公告)日：2013-05-30

申请号：PCT/US2011/068200

申请日：2011-12-30

Applicant: INTEL CORPORATION ,  THERIEN, Guy M. ,  DIEFENBAUGH, Paul S. ,  AGGARWAL, Anil ,  HENROID, Andrew D. ,  SHRALL, Jeremy J. ,  ROTEM, Efraim ,  SISTLA, Krishnakanth V. ,  WEISSMANN, Eliezer

Inventor： THERIEN, Guy M. ,  DIEFENBAUGH, Paul S. ,  AGGARWAL, Anil ,  HENROID, Andrew D. ,  SHRALL, Jeremy J. ,  ROTEM, Efraim ,  SISTLA, Krishnakanth V. ,  WEISSMANN, Eliezer

IPC: G06F1/32 ,  G06F9/22

CPC classification number: G06F9/4403 ,  G06F1/206 ,  G06F1/26 ,  G06F1/28 ,  G06F1/32 ,  G06F1/3203 ,  G06F1/3234 ,  G06F1/324 ,  G06F1/3275 ,  G06F1/3296 ,  G06F9/22 ,  G06F9/30098 ,  G06F9/3012 ,  G06F9/384 ,  G06F9/44 ,  G06F9/4401 ,  G06F9/4418 ,  G06F9/445 ,  G06F11/3024 ,  G06F11/3409 ,  G06F11/3447 ,  G06F11/3466 ,  G06F11/3664 ,  G06F11/3672 ,  G06F11/3688 ,  G06F15/7871 ,  G06F17/30339 ,  G06F2209/501 ,  G06F2217/78 ,  Y02D10/126 ,  Y02D10/172

Abstract: The present invention relates to a platform power management scheme. In some embodiments, a platform provides a relative performance scale using one or more parameters to be requested by an OSPM system.

Abstract translation: 本发明涉及一种平台电源管理方案。 在一些实施例中，平台使用OSPM系统请求的一个或多个参数来提供相对性能量表。

公开(公告)号：WO2013062715A1

公开(公告)日：2013-05-02

申请号：PCT/US2012/057662

申请日：2012-09-27

Applicant: INTEL CORPORATION

Inventor： ANANTHAKRISHNAN, Avinash, N. ,  ROTEM, Efraim ,  RAJWAN, Doron ,  SHRALL, Jeremy J. ,  SAMSON, Eric C. ,  WEISSMANN, Eliezer ,  WELLS, Ryan

IPC: G06F9/06 ,  G06F9/22 ,  G06F13/14 ,  G06F1/32

CPC classification number: G06F1/324 ,  G06F1/26 ,  G06F1/30 ,  G06F1/3203 ,  G06F1/3234 ,  G06F1/3243 ,  G06F13/14 ,  Y02D10/126

Abstract: In one embodiment, the present invention includes a method for determining that a non-core domain of a multi-domain processor is not operating at a frequency requested by the non-core domain, sending a request from the non-core domain to a power controller to reduce a frequency of a core domain of the multi-domain processor, and responsive to the request, reducing the core domain frequency. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括一种用于确定多域处理器的非核心域不以非核域所请求的频率操作的方法，将来自非核心域的请求发送到电源 控制器降低多域处理器核心域的频率，并响应请求，降低核心域频率。 描述和要求保护其他实施例。

公开(公告)号：WO2013036497A2

公开(公告)日：2013-03-14

申请号：PCT/US2012/053726

申请日：2012-09-05

Applicant: INTEL CORPORATION ,  ANANTHAKRISHNAN, Avinash N. ,  ROTEM, Efraim ,  RAJWAN, Doron ,  WEISSMANN, Eliezer ,  SHULMAN, Nadav

Inventor： ANANTHAKRISHNAN, Avinash N. ,  ROTEM, Efraim ,  RAJWAN, Doron ,  WEISSMANN, Eliezer ,  SHULMAN, Nadav

IPC: G06F1/00

CPC classification number: G06F1/26 ,  G06F1/3243 ,  G06F9/5094 ,  Y02D10/152

Abstract: In one embodiment, the present invention includes a method for determining a power budget for a multi-domain processor for a current time interval, determining a portion of the power budget to be allocated to first and second domains of the processor, and controlling a frequency of the domains based on the allocated portions. Such determinations and allocations can be dynamically performed during runtime of the processor. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括一种用于当前时间间隔确定多域处理器的功率预算的方法，确定要分配给处理器的第一和第二域的功率预算的一部分，以及控制频率 基于所分配的部分的域。 这样的确定和分配可以在处理器的运行期间动态地执行。 描述和要求保护其他实施例。

公开(公告)号：WO2013006476A2

公开(公告)日：2013-01-10

申请号：PCT/US2012/045055

申请日：2012-06-29

Applicant: INTEL CORPORATION ,  SHEAFFER, Gad ,  GINZBURG, Boris ,  RONEN, Ronny ,  WEISSMANN, Eliezer

Inventor： SHEAFFER, Gad ,  GINZBURG, Boris ,  RONEN, Ronny ,  WEISSMANN, Eliezer

CPC classification number: G06F12/1027 ,  G06F12/0804 ,  G06F12/126 ,  G06F13/1663 ,  G06F2212/303 ,  G06F2212/657 ,  G06F2212/684

Abstract: A computer system may support one or more techniques to allow dynamic pinning of the memory pages accessed by a non-CPU device (e.g., a graphics processing unit, GPU). The non-CPU may support virtual to physical address mapping and may thus be aware of the memory pages, which may not be pinned but may be accessed by the non-CPU. The non-CPU may notify or send such information to a run-time component such as a device driver associated with the CPU. In one embodiment, the device driver may, dynamically, perform pinning of such memory pages, which may be accessed by the non-CPU. The device driver may even unpin the memory pages, which may be no longer accessed by the non-CPU. Such an approach may allow the memory pages, which may be no longer accessed by the non-CPU to be available for allocation to the other CPUs and/or non-CPUs.

Abstract translation: 计算机系统可支持一种或多种技术以允许由非CPU设备（例如，图形处理单元，GPU）访问的存储器页面的动态锁定。 非CPU可以支持虚拟到物理地址映射，并且因此可以知道存储器页面，其可以不被固定但可以由非CPU访问。 非CPU可以将这些信息通知或发送到运行时间组件，例如与CPU相关联的设备驱动程序。 在一个实施例中，设备驱动器可以动态地执行可以由非CPU访问的这样的存储页面的锁定。 设备驱动程序甚至可以解除内存页面的锁定，这些内存页面可能不再被非CPU访问。 这种方法可以允许非CPU访问的内存页面可用于分配给其他CPU和/或非CPU。

公开(公告)号：WO2006019973A1

公开(公告)日：2006-02-23

申请号：PCT/US2005/025088

申请日：2005-07-15

Applicant: INTEL CORPORATION ,  NAVEH, Alon ,  ROTEM, Efraim ,  WEISSMANN, Eliezer

Inventor： NAVEH, Alon ,  ROTEM, Efraim ,  WEISSMANN, Eliezer

IPC: G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: Systems and methods of managing power provide for issuing a first operating requirement from a first processor core and issuing a second operating requirement from a second processor core. In one embodiment, the operating requirements can reflect either a power policy or a performance policy, depending upon the factor that is currently most important to software. Hardware coordination logic is used to coordinate a shared resource setting with the operating requirements. The hardware coordination logic is also able to coordinate the shared resource setting with independent resource settings of the first and second processor cores based on the operating requirements.

Abstract translation: 管理电力的系统和方法提供从第一处理器核发出第一操作要求并从第二处理器核发出第二操作要求。 在一个实施例中，操作要求可以反映功率策略或性能策略，这取决于当前对于软件最重要的因素。 硬件协调逻辑用于根据操作要求协调共享资源设置。 硬件协调逻辑还能够基于操作要求来协调共享资源设置与第一和第二处理器核心的独立资源设置。