Abstract:
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjonction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned usingt local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.
Abstract:
The invention is an automatic pole-zero adjustment circuit for an ionizing radiation spectroscopy system in which an amplitude histogram circuit (56) is used to obtain an amplitude histogram of an acquired spectrum. The shape of a selected peak from the amplitude histogram is analyzed for peak shaped distortion (142, 146) indicating the existence of undershoot or overshoot. An analog correction signal generated by a pole-zero adjustment network (32) is added to cancel existing undershoot or overshoot, so as to minimize distortion of the peak shape. In an alternate embodiment, the correction signal is a digital transformation algorithm applied to a programmable digital shaping filter (44), so as to digitally minimize distortion of the peak shape.
Abstract:
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjonction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned usingt local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.
Abstract:
A filter circuit for a biaxial signal, etc. which has an excellent sharp filtering characteristic in a narrow band, without performing conversion/inverse conversion from a coordinate system at rest to a rotatory coordinate system. Input signals related to two axes orthogonal to each other are expressed by one complex variable ( u = Ux + jUy: where Ux and Uy are Laplace transformation values of the respective signals). A complex coefficient transfer function F (s - j omega ) which is obtained by replacing the Laplacian s of F(s) is used as the transfer function of real number coefficient of a low- or high-pass filter. Output signals related to two axes orthogonal to each other and passing the input complex variable u through a complex coefficient transfer function F (s - j omega ) are expressed by one complex variable ( V = Vx + jVy: where Vx and Vy are Laplace transformation values of the respective signals). The connection is made with transfer elements of real number coefficient so that the real part and the imaginary part of a transfer expression equation which is obtained by multiplying both sides of a transfer expression equation U . F (s - j omega ) = V of U , F and V as defined above by the denominator of F (s - omega ) may be equal to each other.
Abstract translation:用于双轴信号的滤波器电路等,其在窄带中具有优异的尖锐滤波特性,而不进行从坐标系静止到旋转坐标系的转换/逆变换。 与两个彼此正交的轴相关的输入信号由一个复变量(u u = U x + j U y:其中U x和U y是相应信号的拉普拉斯变换值)来表示。 将通过替换F(s)的拉普拉斯算子获得的复系数传递函数F(s-jω)用作低通或高通的实数系数的传递函数 过滤。 与两个彼此正交的轴相关并且使输入的复数变量u通过复系数传递函数F(s-jω)的输出信号由一个复变量 (uV = Vx + jVy:其中Vx和Vy是各个信号的拉普拉斯变换值)。 连接是用实数系数的传递元素进行的,从而通过将转移表达式u的两边相乘获得的转移表达式的实部和虚部。 如上所定义的(s-jω)= uu,u,u和v> V F(s-ω)的分母可以彼此相等。
Abstract:
Impulse noise suppression upstream of digital processing circuitry contains a sample and hold (S/H) mechanism (24) which samples the input signal and stores a plurality of sequential samples representative of the amplitude of the input signal at successive times. The contents of the S/H are compared with an input signal sample (22) to determine whether there are abnormal amplitude variations which potentially constitute impulse noise. In one embodiment the comparison is referenced to the average magnitude (fig. 6) of the input signal. In another embodiment a cascaded arrangement (fig. 5) of S/H circuits (54-1-N) sample and store a plurality of sequential samples values. The contents of the last S/H circuit (54-N) are compared with the contents of each of selected other S/H circuits of the cascaded chain. A potential noise impulse sample is prevented from being coupled to downstream processing circuitry. Otherwise it is coupled through a downstream lowpass filter for subsequent signal analysis.
Abstract:
A push-pull tunable coupler includes a push transformer, a pull transformer and two compound Josephson junctions arranged in upper and lower branches. Absent biasing, the balanced push and pull of current between the branches causes current from a first object to circulate within a loop and not to be coupled to a second object. Biasing of at least one of the compound Josephson junctions unbalances the push and pull of current in the branches to couple the first and second objects. The coupler has reduced sensitivity to differential-mode noise around the off state, is completely insensitive to common-mode noise, and is capable of inverting the coupled signal with appropriate relative biasing of the compound Josephson junctions.
Abstract:
A capacitively-driven tunable coupler includes a coupling capacitor (110) connecting an open end of a quantum object (104) (i.e., an end of the object that cannot have a DC path to a low-voltage rail, such as a ground node, without breaking the functionality of the object) to an RF SQUID (108) having a Josephson element capable of providing variable inductance and therefore variable coupling to another quantum object (106).
Abstract:
The de-Qing loss and phase imbalance caused by the inherent capacitance of a switched resistance, such as a MOSFET with a resistor, can be reduced by using a shunting switch across the resistor that is in series with the resistor's switch. The shunting switch shorts across the resistor when the resistor's switch is open and in reference mode, thereby significantly reducing the resistance in series with the inherent capacitance of the open resistor's switch.
Abstract:
A signal filtering device (10) is provided for filtering a series of values. The signal filtering device includes a first signal transmission branch (110) with a signal filter (115), wherein the signal filter is configured to filter the series of values, and a second signal transmission branch (120) for passing a value from the signal input interface (100) to the signal output interface (105). The signal filtering device further comprises a signal input interface (100) for receiving the series of values and for providing the received values to the first signal transmission branch and the second signal transmission branch, a signal output interface (105) for outputting a value, a switch, and a switch control device. The switch (130) is configured to selectively connect one of the first signal transmission branch (110) and the second signal transmission branch (120) to the signal output interface (105). The switch control device (140) is connected to the signal input interface (100) and configured to receive the series of values and to control a switching operation of the switch (130) based on the received series of values.