中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

181 records (took 0.031 seconds)

    DOMAIN ADAPTATION FOR WIRELESS SENSING
    2.
    发明申请
    DOMAIN ADAPTATION FOR WIRELESS SENSING 审中-公开

    公开(公告)号：WO2023049601A1

    公开(公告)日：2023-03-30

    申请号：PCT/US2022/075514

    申请日：2022-08-26

    Applicant: QUALCOMM INCORPORATED

    Inventor： LIN, Jamie Menjay ,  DAS, Debasmit ,  PORIKLI, Fatih Murat

    IPC: G06N3/04 ,  G06N3/08 ,  G01S5/02

    Abstract: Certain aspects of the present disclosure provide techniques for domain adaptation. An input tensor comprising channel state information (CSI) for a wireless signal is determined, where each channel in the input tensor corresponds to a respective degree of freedom (DoF) in the wireless signal. A domain-adapted tensor is generated by processing the input tensor using a domain-adaptation network comprising, for each respective DoF in the wireless signal, a respective convolution path. The domain-adapted tensor is provided to a neural network trained for position estimation.

    DYNAMIC ENVELOPE-TRACKING SUPPLY RAIL VOLTAGE SETTING
    4.
    发明申请
    DYNAMIC ENVELOPE-TRACKING SUPPLY RAIL VOLTAGE SETTING 审中-公开

    公开(公告)号：WO2023044245A1

    公开(公告)日：2023-03-23

    申请号：PCT/US2022/075769

    申请日：2022-08-31

    Applicant: QUALCOMM INCORPORATED

    Inventor： SHUTE, Nicholas

    IPC: H03F1/02 ,  H03F3/213 ,  H03F3/24 ,  H03F3/195

    Abstract: The present disclosure generally relates to techniques and apparatus for implementing an envelope-tracking power supply for a radio frequency (RF) power amplifier. One aspect includes an amplification system. The amplification system may include a first amplifier configured to generate an amplifier output voltage, a second amplifier having an output coupled to a supply node for the first amplifier, a voltage regulator having an output coupled to a supply node for the second amplifier, and control circuitry configured to control the voltage regulator to generate a supply voltage at the supply node for the second amplifier based on an indication associated with the amplifier output voltage. In some aspects, the control circuitry may be configured to control the voltage regulator through at least providing an updated control setting for the voltage regulator with a periodicity associated with a power control period.

    MACHINE LEARNING-ASSISTED ADAPTIVE ANTENNA TUNING
    5.
    发明申请
    MACHINE LEARNING-ASSISTED ADAPTIVE ANTENNA TUNING 审中-公开

    公开(公告)号：WO2023034706A1

    公开(公告)日：2023-03-09

    申请号：PCT/US2022/075401

    申请日：2022-08-24

    Applicant: QUALCOMM INCORPORATED

    Inventor： CALZOLARI, Diego ,  WINSLOW, David Loweth ,  HOEFEL, Guilherme ,  BORO, John

    IPC: H04B1/38 ,  H04B1/04 ,  H04B1/18

    Abstract: Certain aspects of the present disclosure provide techniques for adaptively tuning a wireless data transmission system in an electronic device, including receiving one or more operating characteristics of a wireless data transmission system of a device; determining, using a wireless data transmission system configuration model, a target wireless data transmission system configuration based on the one or more operating characteristics; and implementing the target wireless data transmission system configuration in the wireless data transmission system.

    CONFIGURABLE NONLINEAR ACTIVATION FUNCTION CIRCUITS
    6.
    发明申请
    CONFIGURABLE NONLINEAR ACTIVATION FUNCTION CIRCUITS 审中-公开

    公开(公告)号：WO2023034698A1

    公开(公告)日：2023-03-09

    申请号：PCT/US2022/075270

    申请日：2022-08-22

    Applicant: QUALCOMM INCORPORATED

    Inventor： MOHAN, Suren ,  LI, Ren ,  KULKARNI, Prajakt ,  LAMB, Aaron Douglass

    IPC: G06F17/17 ,  G06N3/04 ,  G06N3/063

    Abstract: Certain aspects of the present disclosure provide a processor, comprising: a configurable nonlinear activation function circuit configured to: determine, based on a selected nonlinear activation function, a set of parameters for the nonlinear activation function; and generate output data based on application of the set of parameters for the nonlinear activation function, wherein: the configurable nonlinear activation function circuit comprises at least one nonlinear approximator comprising at least two successive linear approximators, and each linear approximator of the at least two successive linear approximators is configured to approximate a linear function using one or more function parameters of the set of parameters.

    SPARSITY-AWARE COMPUTE-IN-MEMORY
    7.
    发明申请
    SPARSITY-AWARE COMPUTE-IN-MEMORY 审中-公开

    公开(公告)号：WO2023019104A1

    公开(公告)日：2023-02-16

    申请号：PCT/US2022/074660

    申请日：2022-08-08

    Applicant: QUALCOMM INCORPORATED

    Inventor： LI, Ren ,  SRIVASTAVA, Ankit ,  MIRHAJ, Seyed Arash ,  WADHWA, Sameer

    IPC: G06N3/063 ,  G06N3/04 ,  G06N3/08 ,  G06F15/78

    Abstract: Certain aspects of the present disclosure provide techniques for performing machine learning computations in a compute in memory (CIM) array comprising a plurality of bit cells, including: determining that a sparsity of input data to a machine learning model exceeds an input data sparsity threshold; disabling one or more bit cells in the CIM array based on the sparsity of the input data prior to processing the input data; processing the input data with bit cells not disabled in the CIM array to generate an output value; applying a compensation to the output value based on the sparsity to generate a compensated output value; and outputting the compensated output value.

    HYBRID MACHINE LEARNING ARCHITECTURE WITH NEURAL PROCESSING UNIT AND COMPUTE-IN-MEMORY PROCESSING ELEMENTS
    8.
    发明申请
    HYBRID MACHINE LEARNING ARCHITECTURE WITH NEURAL PROCESSING UNIT AND COMPUTE-IN-MEMORY PROCESSING ELEMENTS 审中-公开

    公开(公告)号：WO2023004374A1

    公开(公告)日：2023-01-26

    申请号：PCT/US2022/073979

    申请日：2022-07-21

    Applicant: QUALCOMM INCORPORATED

    Inventor： BADAROGLU, Mustafa ,  WANG, Zhongze ,  RAKSHIT, Titash

    IPC: G06N3/063 ,  G06N3/04

    Abstract: Methods and apparatus for performing machine learning tasks, and in particular, a hybrid architecture that includes both neural processing unit (NPU) and compute-in-memory (CIM) elements. One example neural-network-processing circuit generally includes a plurality of CIM processing elements (PEs), a plurality of neural processing unit (NPU) PEs, and a bus coupled to the plurality of CIM PEs and to the plurality of NPU PEs. One example method for neural network processing generally includes processing data in a neural-network-processing circuit comprising a plurality of CIM PEs, a plurality of NPU PEs, and a bus coupled to the plurality of CIM PEs and to the plurality of NPU PEs; and transferring the processed data between at least one of the plurality of CIM PEs and at least one of the plurality of NPU PEs via the bus.

    DATA-DEPENDENT CLOCK-GATING SWITCH DRIVER FOR A DIGITAL- TO-ANALOG CONVERTER (DAC)
    9.
    发明申请
    DATA-DEPENDENT CLOCK-GATING SWITCH DRIVER FOR A DIGITAL- TO-ANALOG CONVERTER (DAC) 审中-公开

    公开(公告)号：WO2022231818A1

    公开(公告)日：2022-11-03

    申请号：PCT/US2022/023889

    申请日：2022-04-07

    Applicant: QUALCOMM INCORPORATED

    Inventor： SAPUTRA, Nitz ,  SWAMINATHAN, Ashok ,  WEIL, Andrew

    IPC: H03M1/00 ,  H03M1/74

    Abstract: Certain aspects of the present disclosure provide a digital-to-analog conversion circuit. The digital-to-analog conversion circuit generally includes a detection circuit configured to detect digital transitions in a digital input signal. The digital-to-analog conversion circuit also includes a clock-gating circuit having an input coupled to an output of the detection circuit. The clock-gating circuit is configured to gate a clock signal for the digital-to-analog conversion circuit based on an output signal from the detection circuit.

Patent Agency Ranking