公开(公告)号：WO2011046643A3

公开(公告)日：2011-07-14

申请号：PCT/US2010039688

申请日：2010-06-23

Applicant: QUALCOMM INC ,  RANGARAJAN RAJAGOPALAN ,  CHOKSI OJAS M

Inventor： RANGARAJAN RAJAGOPALAN ,  CHOKSI OJAS M

IPC: H03J3/18

CPC classification number: H03J3/18 ,  H03H5/12 ,  H03J2200/36

Abstract: Exemplary embodiments are directed to a programmable varactor device. A varactor device may include an input device configured to receive a tuning voltage and generate a bias voltage at least partially dependent on the tuning voltage. The varactor device may also include a varactor pair coupled to the input device and having a first variable capacitor and a second variable capacitor, wherein each of the first variable capacitor and a second variable capacitor are configured for operable coupling to each of the bias voltage and the tuning voltage.

Abstract translation: 示例性实施例涉及可编程变容二极管装置。 变容二极管器件可以包括被配置为接收调谐电压并且至少部分地依赖于调谐电压产生偏置电压的输入器件。 可变电抗器装置还可以包括耦合到输入装置并具有第一可变电容器和第二可变电容器的变容二极管对，其中第一可变电容器和第二可变电容器中的每一个被配置为可操作地耦合到每个偏置电压和 调谐电压。

公开(公告)号：WO2011003092A1

公开(公告)日：2011-01-06

申请号：PCT/US2010/040958

申请日：2010-07-02

Applicant: QUALCOMM Incorporated ,  CHOKSI, Ojas M. ,  RANJAN, Mahim

Inventor： CHOKSI, Ojas M. ,  RANJAN, Mahim

IPC: H03D7/16

CPC classification number: H03D7/165

Abstract: Techniques for providing an efficient interface between a mixer block and a transconductance (Gm) block. In an exemplary embodiment, the output currents of at least two unit cells of the transconductance block are conductively coupled together, and coupled to the mixer block using a single conductive path. For a differential signal, the conductive path may include two conductive leads. Within the mixer block, the single conductive path may be fanned out to at least two unit cells of the mixer block. At least one Gm unit cell may be selectively enabled or disabled to control the gain setting of the mixer-transconductance block. The techniques may further be applied to transceiver architectures supporting in-phase and quadrature mixing, as well as multi-mode and/or multi-band operation.

Abstract translation: 在混合器块和跨导（Gm）块之间提供有效接口的技术。 在示例性实施例中，跨导块的至少两个单位单元的输出电流被导电耦合在一起，并且使用单个导电路径耦合到混频器块。 对于差分信号，导电路径可以包括两个导电引线。 在混合器块内，单个导电路径可以扇形到混合器块的至少两个单元电池。 可以选择性地使能或禁用至少一个Gm单位单元来控制混频器 - 跨导块的增益设置。 这些技术可以进一步应用于支持同相和正交混合以及多模式和/或多频带操作的收发器架构。

公开(公告)号：WO2005057869A3

公开(公告)日：2008-01-03

申请号：PCT/US2004034632

申请日：2004-10-20

Applicant: ANALOG DEVICES INC ,  MANGINO ALFRED ,  CHOKSI OJAS M ,  SABOURI FARAMARZ

Inventor： MANGINO ALFRED ,  CHOKSI OJAS M ,  SABOURI FARAMARZ

IPC: H04L25/02 ,  H04B1/58

CPC classification number: H04B1/581 ,  H04L25/0272

Abstract: A transceiver system is disclosed for use in a telecommunication system. The transceiver system includes a transmission circuit with a differential transmitter input coupled via a transmitter input stage to a differential input of a transmission amplifier in an embodiment. The transmitter input stage includes a trimmable resistor, one end of which is coupled to a positive transmit input signal, and the other end of which is coupled to a negative transmit input signal. The transceiver system also includes a receiver circuit with a differential receiver output coupled to a differential input of a receiver amplifier, and further includes a transmission line interface circuit coupled to a differential output of said transmission amplifier and to a differential input of said receiver amplifier. In accordance with other embodiments, the receiver amplifier includes an input stage that includes a first plurality of capacitors and a feedback circuit that includes a second plurality of capacitors.

Abstract translation: 公开了一种在电信系统中使用的收发机系统。 收发器系统包括具有通过发射机输入级耦合到实施例中的发射放大器的差分输入的差分发射机输入的发射电路。 发射机输入级包括可调整电阻器，其一端耦合到正传输输入信号，另一端耦合到负发射输入信号。 收发器系统还包括具有耦合到接收机放大器的差分输入的差分接收器输出的接收器电路，并且还包括耦合到所述发送放大器的差分输出和所述接收放大器的差分输入的传输线接口电路。 根据其他实施例，接收机放大器包括包括第一多个电容器的输入级和包括第二多个电容器的反馈电路。

公开(公告)号：WO2011003094A1

公开(公告)日：2011-01-06

申请号：PCT/US2010/040960

申请日：2010-07-02

Applicant: QUALCOMM Incorporated ,  CHOKSI, Ojas M. ,  RANJAN, Mahim

Inventor： CHOKSI, Ojas M. ,  RANJAN, Mahim

IPC: H03D7/16

CPC classification number: H03D7/165

Abstract: Techniques for providing an efficient interface between a mixer block and a transconductance (Gm) block. In an exemplary embodiment, the output currents of at least two unit cells of the transconductance block are conductively coupled together, and coupled to the mixer block using a single conductive path. For a differential signal, the conductive path may include two conductive leads. Within the mixer block, the single conductive path may be fanned out to at least two unit cells of the mixer block. At least one Gm unit cell may be selectively enabled or disabled to control the gain setting of the mixer-transconductance block. The techniques may further be applied to transceiver architectures supporting in-phase and quadrature mixing, as well as multi-mode and/or multi-band operation.

Abstract translation: 在混合器块和跨导（Gm）块之间提供有效接口的技术。 在示例性实施例中，跨导块的至少两个单位单元的输出电流被导电耦合在一起，并且使用单个导电路径耦合到混频器块。 对于差分信号，导电路径可以包括两个导电引线。 在混合器块内，单个导电路径可以扇形到混合器块的至少两个单元电池。 可以选择性地使能或禁用至少一个Gm单位单元来控制混频器 - 跨导块的增益设置。 这些技术可以进一步应用于支持同相和正交混合以及多模式和/或多频带操作的收发器架构。

公开(公告)号：WO2005057869A2

公开(公告)日：2005-06-23

申请号：PCT/US2004/034632

申请日：2004-10-20

Applicant: ANALOG DEVICES, INC. ,  MANGINO, Alfred ,  CHOKSI, Ojas, M. ,  SABOURI, Faramarz

Inventor： MANGINO, Alfred ,  CHOKSI, Ojas, M. ,  SABOURI, Faramarz

IPC: H04L25/00

CPC classification number: H04B1/581 ,  H04L25/0272

Abstract: A transceiver system is disclosed for use in a telecommunication system. The transceiver system includes a transmission circuit with a differential transmitter input coupled via a transmitter input stage to a differential input of a transmission amplifier in an embodiment. The transmitter input stage includes a trimmable resistor, one end of which is coupled to a positive transmit input signal, and the other end of which is coupled to a negative transmit input signal. The transceiver system also includes a receiver circuit with a differential receiver output coupled to a differential input of a receiver amplifier, and further includes a transmission line interface circuit coupled to a differential output of said transmission amplifier and to a differential input of said receiver amplifier. In accordance with other embodiments, the receiver amplifier includes an input stage that includes a first plurality of capacitors and a feedback circuit that includes a second plurality of capacitors.

Abstract translation: 公开了一种在电信系统中使用的收发机系统。 收发器系统包括具有通过发射机输入级耦合到实施例中的发射放大器的差分输入的差分发射机输入的发射电路。 发射机输入级包括可调整电阻器，其一端耦合到正传输输入信号，另一端耦合到负发射输入信号。 收发器系统还包括具有耦合到接收机放大器的差分输入的差分接收器输出的接收器电路，并且还包括耦合到所述发送放大器的差分输出和所述接收放大器的差分输入的传输线接口电路。 根据其他实施例，接收机放大器包括包括第一多个电容器的输入级和包括第二多个电容器的反馈电路。

公开(公告)号：WO2009079441A3

公开(公告)日：2009-11-26

申请号：PCT/US2008086793

申请日：2008-12-15

Applicant: QUALCOMM INC ,  CHOKSI OJAS M ,  BOSSU FREDERIC

Inventor： CHOKSI OJAS M ,  BOSSU FREDERIC

IPC: H04L27/00

CPC classification number: H04L5/1461 ,  H03D3/009 ,  H03M1/1019 ,  H03M1/66 ,  H04L27/0014 ,  H04L2027/0016 ,  H04L2027/0018 ,  H04L2027/0024

Abstract: Techniques are provided for reducing mismatch between the in-phase (I) and quadrature (Q) channels of a communications transmitter or receiver. In an exemplary embodiment, separate voltages are applied to bias the gates or bulks of the transistors in a mixer of the I channel versus a mixer of the Q channel. In another exemplary embodiment, separate voltages are applied to bias the common-mode reference voltage of a transimpedance amplifier associated with each channel. Techniques are further provided for deriving bias voltages to minimize a measured residual sideband in a received or transmitted signal, or to optimize other parameters of the received or transmitted signal. Techniques for generating separate bias voltages using a bidirectional and unidirectional current digital-to-analog converter (DAC) are also disclosed.

Abstract translation: 提供了用于减少通信发射机或接收机的同相（I）和正交（Q）信道之间的失配的技术。 在一个示例性实施例中，施加分开的电压以偏置I信道的混频器中的晶体管的栅极或大块与Q信道的混频器。 在另一个示例性实施例中，施加单独的电压以偏置与每个通道相关联的互阻抗放大器的共模基准电压。 还提供了用于导出偏置电压以最小化接收或发送的信号中的测量的残留边带或者优化接收或发送的信号的其他参数的技术。 还公开了使用双向和单向电流数字 - 模拟转换器（DAC）生成单独偏置电压的技术。

公开(公告)号：WO2011046643A2

公开(公告)日：2011-04-21

申请号：PCT/US2010/039688

申请日：2010-06-23

Applicant: QUALCOMM Incorporated ,  RANGARAJAN, Rajagopalan ,  CHOKSI, Ojas M.

Inventor： RANGARAJAN, Rajagopalan ,  CHOKSI, Ojas M.

IPC: H03J3/18

CPC classification number: H03J3/18 ,  H03H5/12 ,  H03J2200/36

Abstract: Exemplary embodiments are directed to a programmable varactor device. A varactor device may include an input device configured to receive a tuning voltage and generate a bias voltage at least partially dependent on the tuning voltage. The varactor device may also include a varactor pair coupled to the input device and having a first variable capacitor and a second variable capacitor, wherein each of the first variable capacitor and a second variable capacitor are configured for operable coupling to each of the bias voltage and the tuning voltage.

Abstract translation: 示例性实施例针对可编程变容二极管器件。 变容管装置可以包括输入装置，其被配置为接收调谐电压并且至少部分地取决于调谐电压来生成偏置电压。 该变容二极管装置还可以包括耦合到输入装置并具有第一可变电容器和第二可变电容器的变容二极管对，其中第一可变电容器和第二可变电容器中的每一个被配置用于可操作地耦合到每个偏置电压，以及 调谐电压。

公开(公告)号：WO2009079441A2

公开(公告)日：2009-06-25

申请号：PCT/US2008/086793

申请日：2008-12-15

Applicant: QUALCOMM INCORPORATED ,  CHOKSI, Ojas, M. ,  BOSSU, Frederic

Inventor： CHOKSI, Ojas, M. ,  BOSSU, Frederic

IPC: H04L27/00

CPC classification number: H04L5/1461 ,  H03D3/009 ,  H03M1/1019 ,  H03M1/66 ,  H04L27/0014 ,  H04L2027/0016 ,  H04L2027/0018 ,  H04L2027/0024

Abstract: Techniques are provided for reducing mismatch between the in-phase (I) and quadrature (Q) channels of a communications transmitter or receiver. In an exemplary embodiment, separate voltages are applied to bias the gates or bulks of the transistors in a mixer of the I channel versus a mixer of the Q channel. In another exemplary embodiment, separate voltages are applied to bias the common-mode reference voltage of a transimpedance amplifier associated with each channel. Techniques are further provided for deriving bias voltages to minimize a measured residual sideband in a received or transmitted signal, or to optimize other parameters of the received or transmitted signal. Techniques for generating separate bias voltages using a bidirectional and unidirectional current digital-to-analog converter (DAC) are also disclosed.

Abstract translation: 提供了用于减少通信发射机或接收机的同相（I）和正交（Q）信道之间的失配的技术。 在示例性实施例中，施加单独的电压以在I通道的混频器中与Q通道的混频器偏置晶体管的栅极或体积。 在另一示例性实施例中，施加单独的电压以偏置与每个通道相关联的跨阻抗放大器的共模参考电压。 还提供了用于导出偏置电压以最小化接收或发射信号中测量的残留边带或者优化接收或发射信号的其它参数的技术。 还公开了使用双向和单向电流数模转换器（DAC）产生单独偏置电压的技术。

公开(公告)号：WO2009058484A1

公开(公告)日：2009-05-07

申请号：PCT/US2008/076325

申请日：2008-09-12

Applicant: QUALCOMM INCORPORATED ,  SAHOTA, Gurkanwal, Singh ,  BOSSU, Frederic ,  CHOKSI, Ojas, M.

Inventor： SAHOTA, Gurkanwal, Singh ,  BOSSU, Frederic ,  CHOKSI, Ojas, M.

IPC: H03G3/30 ,  H03D7/16 ,  H03D7/14

CPC classification number: H03D7/1441 ,  H03D7/165 ,  H03D7/166 ,  H03D2200/0084 ,  H03D2200/009

Abstract: Selectable sizes for a local oscillator (LO) buffer and mixer are disclosed. In an embodiment, LO buffer and/or mixer size may be increased when a receiver operates in a high gain mode, while LO buffer and/or mixer size may be decreased when the receiver operates in a low gain mode. In an embodiment, LO buffer and mixer sizes are increased and decreased in lock step. Circuit topologies and control schemes for specific embodiments of LO buffers and mixers having adjustable size are disclosed.

Abstract translation: 公开了本地振荡器（LO）缓冲器和混频器的可选尺寸。 在一个实施例中，当接收机以高增益模式工作时，可以增加LO缓冲器和/或混频器的大小，而当接收器以低增益模式工作时，可以减小LO缓冲器和/或混频器的大小。 在一个实施例中，LO缓冲器和混合器尺寸在锁定步骤中增加和减小。 公开了具有可调节尺寸的LO缓冲器和混合器的具体实施例的电路拓扑和控制方案。

公开(公告)号：WO2009036399A1

公开(公告)日：2009-03-19

申请号：PCT/US2008/076324

申请日：2008-09-12

Applicant: QUALCOMM Incorporated ,  ANIRUDDHAN, Sankaran ,  NARATHONG, Chiewcharn ,  SRIDHARA, Sriramgopal ,  SRIDHARA, Ravi ,  SAHOTA, Gurkanwal, Singh ,  BOSSU, Frederic ,  CHOKSI, Ojas, M.

Inventor： ANIRUDDHAN, Sankaran ,  NARATHONG, Chiewcharn ,  SRIDHARA, Sriramgopal ,  SRIDHARA, Ravi ,  SAHOTA, Gurkanwal, Singh ,  BOSSU, Frederic ,  CHOKSI, Ojas, M.

IPC: H03G3/30 ,  H03D7/16 ,  H03D7/14

CPC classification number: H03D7/166 ,  H03D7/1441 ,  H03D7/1483 ,  H03D7/165 ,  H03D2200/0025 ,  H03G3/3052

Abstract: Selectable sizes for a local oscillator (LO) buffer and mixer are disclosed. In an exemplary embodiment, LO buffer and/or mixer size may be increased when a receiver or transmitter operates in a high gain mode, while LO buffer and/or mixer size may be decreased when the receiver or transmitter operates in a low gain mode. In an exemplary embodiment, LO buffer and mixer sizes are increased and decreased in lock step. Circuit topologies and control schemes for specific exemplary embodiments of LO buffers and mixers having adjustable size are disclosed.

Abstract translation: 公开了本地振荡器（LO）缓冲器和混频器的可选尺寸。 在示例性实施例中，当接收机或发射机以高增益模式工作时，可以增加LO缓冲器和/或混频器大小，而当接收机或发射机以低增益模式工作时，LO缓冲器和/或混频器大小可能会减小。 在示例性实施例中，锁定步骤中LO缓冲器和混合器尺寸增加和减小。 公开了具有可调节尺寸的LO缓冲器和混合器的具体示例性实施例的电路拓扑和控制方案。