公开(公告)号：WO2018232178A1

公开(公告)日：2018-12-20

申请号：PCT/US2018/037635

申请日：2018-06-14

Applicant: GELMAN, Anatoly ,  DOSLUOGLU, Taner ,  CHAOYANG SEMICONDUCTOR JIANGYIN TECHNOLOGY CO., LTD.

Inventor： GELMAN, Anatoly ,  DOSLUOGLU, Taner

IPC: H02M3/156 ,  H02M1/08

Abstract: Systems and methods for providing an indication of an output current of a voltage regulator applied to a load at an indicated time to a processor. An indication of the output current of a voltage regulator is determined in response to a clock signal received from a clock source and a frame number of a frame is determined from the clock source. The indication of the current output and the frame number of the associated frame are provided to the processor.

公开(公告)号：WO2016197149A1

公开(公告)日：2016-12-08

申请号：PCT/US2016/036103

申请日：2016-06-06

Applicant: DOSLUOGLU, Taner ,  GELMAN, Anatoly

Inventor： DOSLUOGLU, Taner ,  GELMAN, Anatoly

IPC: G06F17/50

CPC classification number: G06F17/505 ,  G06F17/5022 ,  G06F17/5036 ,  G06F17/5068 ,  G06F2217/78

Abstract: A method for design of a power delivery network (PDN) integrated with a digital design flow is provided. The method comprises receiving parameters for a PDN; receiving a model of logic circuitry for an integrated circuit; simulating operation of a plurality of configurations of the PDN for the model of logic circuitry over a specified range of minimum voltage; generating a netlist representation of a selected PDN configuration; and processing the netlist representation of the selected PDN configuration along with a digital circuit design for the logic circuitry.

Abstract translation: 提供了与数字设计流程集成的功率传递网络（PDN）的设计方法。 该方法包括接收PDN的参数; 接收用于集成电路的逻辑电路的模型; 在特定的最小电压范围内模拟逻辑电路模型的PDN的多个配置的操作; 生成所选PDN配置的网表表示; 以及处理所选PDN配置的网表表示以及逻辑电路的数字电路设计。