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    CALIBRATION ARRANGEMENT FOR FREQUENCY SYNTHESIZERS
    1.
    发明申请
    CALIBRATION ARRANGEMENT FOR FREQUENCY SYNTHESIZERS 审中-公开
    频率合成器的校准安排

    公开(公告)号：WO2014013289A1

    公开(公告)日：2014-01-23

    申请号：PCT/IB2012/001660

    申请日：2012-07-20

    申请人： FREESCALE SEMICONDUCTOR, INC. ,  GAUTHIER, Laurent ,  DELBECQ, Dominique ,  VIGIER, Jean Stéphane

    发明人： GAUTHIER, Laurent ,  DELBECQ, Dominique ,  VIGIER, Jean Stéphane

    IPC分类号： H03L7/08 ,  H03L7/099

    CPC分类号： H04L7/0331 ,  H03C3/0925 ,  H03L7/197

    摘要： An electronic device has a calibration arrangement (120) for controlling a frequency characteristic of a PLL circuit having a phase comparator (112) having an output for generating a phase difference signal, a voltage controlled oscillator (1 15) and a divider (114). The divisor of the divider is programmable, and the oscillator is also directly modulated by an oscillator modulation signal. A modulation unit (130) has a modulation input for receiving a modulation signal and generates the oscillator modulation signal and the divisor such that modulation generates a predefined change of the output frequency and a change of the divisor proportional to said predefined change. The calibration arrangement receives the phase difference signal, and has a ripple detector (121 ) for providing a detector output signal by detecting a ripple on the phase difference signal correlated to edges in the modulation signal. A calibration control unit (122) adjusts the oscillator modulation signal based on the detector output signal such that the ripple is reduced.

    摘要翻译： 电子设备具有用于控制具有相位比较器（112）的PLL电路的频率特性的校准装置（120），所述相位比较器具有产生相位差信号的输出端，压控振荡器（115）和分频器（114） 。 除法器的除数是可编程的，并且振荡器也被振荡器调制信号直接调制。 调制单元（130）具有用于接收调制信号的调制输入，并产生振荡器调制信号和除数，使得调制产生预定义的输出频率变化和与所述预定变化成比例的除数的变化。 校准装置接收相位差信号，并且具有纹波检测器（121），用于通过检测与调制信号中的边缘相关的相位差信号上的纹波来提供检测器输出信号。 校准控制单元（122）基于检测器输出信号来调整振荡器调制信号，使得纹波减小。

    WAKE-UP CONTROL SYSTEM AND METHOD FOR CONTROLLING RECEIVER WAKE-UP
    4.
    发明申请
    WAKE-UP CONTROL SYSTEM AND METHOD FOR CONTROLLING RECEIVER WAKE-UP 审中-公开
    唤醒控制系统和控制接收器唤醒的方法

    公开(公告)号：WO2010032091A1

    公开(公告)日：2010-03-25

    申请号：PCT/IB2008/055618

    申请日：2008-09-19

    申请人： FREESCALE SEMICONDUCTOR, INC. ,  GAUTHIER, Laurent ,  LANDEZ, Christophe

    发明人： GAUTHIER, Laurent ,  LANDEZ, Christophe

    IPC分类号： H04B1/16 ,  G07C9/00

    CPC分类号： H04W52/0283 ,  G07C2009/00373 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/162 ,  Y02D70/26

    摘要： A wake-up control system (32, 90) comprises a plurality of different signal analyzer units (34-44). The plurality of different signal analyzer units (34-44) may process a value of a different parameter of an incoming signal (46) received at an input (48) of a receiver (50) and provide a false wake-up indication (54-64) for the parameter when the value of the parameter is outside an acceptance range for the value. The system further comprises an evaluation unit (66) connected to the plurality of different signal analyzer units for receiving the false wake-up indications. The evaluation unit may provide a false wake-up parameter information (68) identifying an identified parameter of the different parameters when a sum of the false wake-up indications is outside an occurrence range for the false wake-up indications for the identified parameter.

    摘要翻译： 唤醒控制系统（32,90）包括多个不同的信号分析器单元（34-44）。 多个不同信号分析器单元（34-44）可以处理在接收器（50）的输入端（48）处接收到的输入信号（46）的不同参数的值，并且提供虚拟唤醒指示（54 -64），当参数的值超出该值的接受范围时。 该系统还包括连接到多个不同信号分析器单元的评估单元（66），用于接收假唤醒指示。 当假唤醒指示的和超出所识别的参数的假唤醒指示的发生范围之外时，评估单元可以提供识别不同参数的已识别参数的伪唤醒参数信息（68）。

    COMPUTATIONAL GENERATION OF NARROW-BANDWIDTH DIGITAL SIGNALS
    5.
    发明申请
    COMPUTATIONAL GENERATION OF NARROW-BANDWIDTH DIGITAL SIGNALS 审中-公开
    窄带数字信号的计算生成

    公开(公告)号：WO2010023509A1

    公开(公告)日：2010-03-04

    申请号：PCT/IB2008/054481

    申请日：2008-08-26

    申请人： FREESCALE SEMICONDUCTOR, INC. ,  GAUTHIER, Laurent

    发明人： GAUTHIER, Laurent

    IPC分类号： H03K5/01

    CPC分类号： H04L27/122 ,  H03L7/1976

    摘要： A signal shaper (10) generates an output signal (16) representing a binary sequence, the output signal (16) being the time-dependence of a signal value F . The signal shaper is input a first signal value F0 and a different second signal value F 1 , and receives a sequence of data bits (12), each data bit having a state which is either 'zero' or 'one', the sequence containing at least a first data bit (11 ) and a subsequent second data bit (13). The signal shaper (10) determines the state of the first data bit (11 ) and the state of the second data bit (13); if the state of the first data bit (11 ) and the state of the second data bit (13) are determined to be 'zero' and 'one', respectively, the signal shaper controls the signal value F to change monotonically from the first signal value F 0 at a first point in time (2) via one or more intermediate values at intermediate points in time (4) to a second signal value F1 at a later second point in time (6). Similarly, if the state of the first data bit (11 ) and the state of the second data bit (13) are determined to be 'one' and 'zero', respectively, the signal shaper (10) controls the signal value F to change monotonically from the second signal value F 1 at the first point in time (2) via one or more intermediate values at intermediate points in time (4) to the first signal value F0 at the second point in time (6). The signal value F may be a frequency or amplitude of a voltage or current. On the time interval from the first point in time (2) to the second point in time (6), the output signal (16) may be a monotonic step function.

    摘要翻译： 信号整形器（10）产生表示二进制序列的输出信号（16），输出信号（16）是信号值F的时间依赖性。信号整形器输入第一信号值F0和不同的第二信号 值F 1，并且接收数据位序列（12），每个数据位具有“零”或“一”的状态，所述序列至少包含第一数据位（11）和后续第二数据位 （13）。 信号整形器（10）确定第一数据位（11）的状态和第二数据位（13）的状态。 如果第一数据位（11）的状态和第二数据位（13）的状态分别被确定为“零”和“1”，则信号整形器控制信号值F从第一数据位 信号值F 0在第一时间点（2）经由中间时间点（4）的一个或多个中间值到稍后的第二时间点（6）的第二信号值F1。 类似地，如果第一数据位（11）的状态和第二数据位（13）的状态分别被确定为“一”和“零”，则信号整形器（10）控制信号值F至 在第二时间点（6），通过中间时间点（4）的一个或多个中间值，将第一时间点（2）的第二信号值F 1单调地改变为第一信号值F0。 信号值F可以是电压或电流的频率或幅度。 在从第一时间点（2）到第二时间点（6）的时间间隔上，输出信号（16）可以是单调阶跃函数。

    INTEGRATED CIRCUIT DEVICE, WIRELESS COMMUNICATION UNIT AND METHOD OF MANUFACTURE THEREFOR
    9.
    发明申请
    INTEGRATED CIRCUIT DEVICE, WIRELESS COMMUNICATION UNIT AND METHOD OF MANUFACTURE THEREFOR 审中-公开
    集成电路设备，无线通信单元及其制造方法

    公开(公告)号：WO2012049529A1

    公开(公告)日：2012-04-19

    申请号：PCT/IB2010/003022

    申请日：2010-10-15

    申请人： FREESCALE SEMICONDUCTOR, INC. ,  GAUTHIER, Laurent

    发明人： GAUTHIER, Laurent

    IPC分类号： H04B1/40 ,  H04B7/04

    CPC分类号： H04B1/40 ,  H04B1/406 ,  H04B7/0413

    摘要： An integrated circuit device (200) comprising at least one radio frequency (RF) transceiver module (210) The at least one RF transceiver module (210) comprises a plurality of low noise amplifiers (LNAs) (220, 223, 226) operably coupled at inputs (221, 22, 227) thereof to external contacts (202, 204) of the integrated circuit device (200) and arranged to receive an RF signal from the respective external contact (202, 204), amplify the received RF signal, and to output (222, 225. 228) the amplified RF signal The at least one transceiver module (210) further comprises a plurality of power amplifier (PA) modules (230, 235) operably coupled at outputs (231, 236) thereof to the external contact (202, 204) of the integrated circuit device, and arranged to receive at inputs (232, 237) thereof an RF signal to be transmitted, amplify the received RF signal to be transmitted, and output (231, 236) the amplified signal The plurality of LNAs (220, 223, 226) and the plurality of PAs (230, 235) are selectively configurable to operate in at least a first, multi-antenna configuration and a second, single antenna high transmit power configuration

    摘要翻译： 包括至少一个射频（RF）收发器模块（210）的集成电路装置（200）。所述至少一个RF收发器模块（210）包括多个低噪声放大器（LNA）（220,223,226），可操作地耦合 在其输入（221,22,227）处的集成电路装置（200）的外部触点（202,204）上并被布置成从相应的外部触点（202,204）接收RF信号，放大所接收的RF信号， 并且输出（222,225,228）放大的RF信号。所述至少一个收发器模块（210）还包括多个功率放大器（PA）模块（230,235），其在其输出端（231,236）处可操作地耦合到 集成电路装置的外部触点（202,204），并且被布置为在其输入（232,237）处接收要发送的RF信号，放大所接收的要发送的RF信号，并输出（231,236） 多个LNA（220,223,226）和多个PA（230,235）是s 可选地配置为在至少第一，多天线配置和第二单天线高发射功率配置中操作