NON-VOLATILE MEMORY AND METHOD WITH ATOMIC PROGRAM SEQUENCE AND WRITE ABORT DETECTION
    1.
    发明申请
    NON-VOLATILE MEMORY AND METHOD WITH ATOMIC PROGRAM SEQUENCE AND WRITE ABORT DETECTION 审中-公开
    非易失性存储器和方法与原子程序序列和写入检测

    公开(公告)号:WO2011075576A1

    公开(公告)日:2011-06-23

    申请号:PCT/US2010/060778

    申请日:2010-12-16

    Abstract: A program operation in a non-volatile memory is segmented at predefined junctures into smaller segments for execution over different times. The predefined junctures are such that they allow unambiguous identification when restarting the operation in a next segment so that the operation can continue without having to restart from the very beginning of the operation. This is accomplished by requiring the programming sequence of each segment to be atomic, that is, to only terminate at a predetermined type of programming step. In a next segment, the terminating programming step is identified by detecting a predetermined pattern of ECC errors across a group of programmed wordlines.

    Abstract translation: 非易失性存储器中的程序操作在预定义的接合处被分割成较小的段,以便在不同时间执行。 预定义的接合点使得它们在重新开始下一段中的操作时允许明确的识别,使得操作可以继续而不必从操作的开始就重新开始。 这是通过要求每个段的编程序列是原子的,即仅在预定类型的编程步骤终止来实现的。 在下一段中,通过检测一组编程的字线的ECC错误的预定模式来识别终止编程步骤。

    NON-VOLATILE MEMORY AND METHOD WITH WRITE CACHE PARTITIONING
    2.
    发明申请
    NON-VOLATILE MEMORY AND METHOD WITH WRITE CACHE PARTITIONING 审中-公开
    非易失性存储器和写入缓存分区的方法

    公开(公告)号:WO2010078222A1

    公开(公告)日:2010-07-08

    申请号:PCT/US2009/069535

    申请日:2009-12-24

    Abstract: A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. Decisions to write data to the cache memory or directly to the main memory or decisions to archive data from the cache memory to the main memory depend on the attributes and characteristics of the data to be written, the state of the blocks in the main memory portion and the state of the blocks in the cache portion. The cache memory has a capacity dynamically increased by allocation of blocks from the main memory in response to a demand to increase the capacity. Preferably, a block with an endurance count higher than average is allocated. The logical addresses of data are partitioned into zones to limit the size of the indices for the cache.

    Abstract translation: 将非易失性存储器的一部分从主多层存储器阵列分区以作为高速缓存进行操作。 缓存存储器被配置为以比每个存储器单元更少的容量存储和与主存储器相比写入单元的更细粒度。 在面向块的存储器架构中,缓存具有多个功能,而不仅仅是提高访问速度,而是顺序更新块系统的组成部分。 将数据写入高速缓冲存储器或直接写入主存储器的决定或将数据从高速缓冲存储器归档到主存储器的决定取决于要写入的数据的属性和特性,主存储器部分中的块的状态 以及高速缓存部分中的块的状态。 响应于增加容量的需求,高速缓冲存储器具有通过从主存储器分配块而动态增加的容量。 优选地,分配耐力计数高于平均值的块。 数据的逻辑地址被划分为区域以限制高速缓存的索引的大小。

    MANAGING HOUSEKEEPING OPERATIONS IN FLASH MEMORY
    3.
    发明申请
    MANAGING HOUSEKEEPING OPERATIONS IN FLASH MEMORY 审中-公开
    管理闪存中的住宅操作

    公开(公告)号:WO2008147752A1

    公开(公告)日:2008-12-04

    申请号:PCT/US2008/064123

    申请日:2008-05-19

    Abstract: A flash re-programmable, non-volatile memory system is operated to disable foreground execution of housekeeping operations, such as wear leveling and data scrub, in the when operation of the host would be excessively slowed as a result. One or more characteristics of patterns of activity of the host are monitored by the memory system in order to determine when housekeeping operations may be performed without significantly degrading the performance of the memory system, particularly during writing of data from the host into the memory.

    Abstract translation: 操作闪存可重新编程的非易失性存储器系统,以在主机的操作过程将会过慢时,禁止前端执行内务管理操作(例如损耗均衡和数据擦除)。 主机的活动模式的一个或多个特征由存储器系统监视,以便确定何时可执行内部管理操作而不显着降低存储器系统的性能,特别是在将数据从主机写入存储器期间。

    PHASED GARBAGE COLLECTION
    4.
    发明申请
    PHASED GARBAGE COLLECTION 审中-公开
    相位垃圾收集

    公开(公告)号:WO2008042592A3

    公开(公告)日:2008-06-12

    申请号:PCT/US2007078817

    申请日:2007-09-19

    Abstract: A method for phased garbage collection is described, the method including receiving a write command to write a memory write to a metablock, performing a first portion of a garbage collection operation, and storing the memory write in a buffer portion of the metablock.

    Abstract translation: 描述了用于分阶段垃圾收集的方法,该方法包括:接收写入命令以将存储器写入写入元区块,执行垃圾收集操作的第一部分,以及将存储器写入存储在元区块的缓冲区部分中。

    PHASED GARBAGE COLLECTION
    5.
    发明申请
    PHASED GARBAGE COLLECTION 审中-公开
    相位收集

    公开(公告)号:WO2008042592A2

    公开(公告)日:2008-04-10

    申请号:PCT/US2007/078817

    申请日:2007-09-19

    Abstract: A method for phased garbage collection is described, the method including receiving a write command to write a memory write to a metablock, performing a first portion of a garbage collection operation, and storing the memory write in a buffer portion of the metablock.

    Abstract translation: 描述了一种用于分阶段垃圾收集的方法,所述方法包括:接收写指令以写入元区块的存储器写入,执行垃圾回收操作的第一部分,以及将所述存储器写入存储在所述元区块的缓冲器部分中。

    SCRATCH PAD BLOCK
    6.
    发明申请
    SCRATCH PAD BLOCK 审中-公开
    刮刀垫块

    公开(公告)号:WO2006065566A1

    公开(公告)日:2006-06-22

    申请号:PCT/US2005/043811

    申请日:2005-12-01

    CPC classification number: G06F12/0246 G06F2212/7203

    Abstract: In a memory array having a minimum unit of erase of a block, a scratch pad block is used to store data that is later written to another block. The data may be written to the scratch pad block with a low degree of parallelism and later written to another location with a high degree of parallelism so that it is stored with high density. Data may be temporarily stored in the scratch pad block until it can be more efficiently stored elsewhere. This may be when some other data is received. Unrelated data may be stored in the same page of a scratch pad block.

    Abstract translation: 在具有块的最小擦除单位的存储器阵列中,使用便笺块块来存储稍后写入另一块的数据。 数据可以以低度的平行度写入到便签块块中,并且随后以高度并行度写入另一位置,使得其以高密度存储。 数据可以临时存储在便签区块中,直到其可以更有效地存储在别处。 这可能是在收到某些其他数据时。 不相关的数据可能存储在暂存区块的同一页中。

    NON-VOLATILE MEMORY AND METHOD WITH PHASED PROGRAM FAILURE HANDLING
    8.
    发明申请
    NON-VOLATILE MEMORY AND METHOD WITH PHASED PROGRAM FAILURE HANDLING 审中-公开
    非易失性存储器和具有相位程序故障处理的方法

    公开(公告)号:WO2005066964A2

    公开(公告)日:2005-07-21

    申请号:PCT/US2004/043597

    申请日:2004-12-22

    IPC: G11C

    CPC classification number: G06F11/0793 G06F11/073 G06F12/0246 G06F2212/7205

    Abstract: In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block.

    Abstract translation: 在具有块管理系统的存储器中,在时间要求严格的存储器操作期间,通过继续在突破块中编程操作来处理程序块中的程序故障。 之后,在不太关键的时间,在中断之前记录在故障块中的数据被传送到另一个块,该块也可以是分支块。 然后可以丢弃失败的块。 通过这种方式,当在编程过程中遇到有缺陷的块时,可以在不丢失数据的情况下处理它,并且不会在超过规定的时间限制的情况下通过现场传送存储在有缺陷块中的数据。 这种错误处理对于垃圾收集操作尤其重要,以便在关键时间内不需要在新块上重复整个操作。 随后,在适当的时候,来自缺陷块的数据可以通过重新定位到另一个块来挽救。

    NON-VOLATILE MEMORY AND METHOD WITH SMALL LOGICAL GROUPS DISTRIBUTED AMONG ACTIVE SLC AND MLC MEMORY PARTITIONS
    10.
    发明申请
    NON-VOLATILE MEMORY AND METHOD WITH SMALL LOGICAL GROUPS DISTRIBUTED AMONG ACTIVE SLC AND MLC MEMORY PARTITIONS 审中-公开
    非易失性存储器和方法与主动SLC和MLC存储器分区中分布的小逻辑组

    公开(公告)号:WO2012158514A1

    公开(公告)日:2012-11-22

    申请号:PCT/US2012/037511

    申请日:2012-05-11

    Abstract: A non-volatile memory organized into flash erasable blocks receives data from host writes by first staging into logical groups before writing into the blocks. Each logical group contains data from a predefined set of order logical addresses and has a fixed size smaller than a block. The totality of logical groups are obtained by partitioning a logical address space of the host into non-overlapping sub-ranges of ordered logical addresses, each logical group having a predetermined size within a range delimited by a minimum size of at least one page and a maximum size of fitting at least two logical groups in a block and up to an order of magnitude higher than a typical size of a host write. In this way, excessive garbage collection due to operating a large logical group is avoided while the address space is reduced to minimize the size of a caching RAM.

    Abstract translation: 组织成闪存可擦除块的非易失性存储器通过在写入块之前先进入逻辑组来接收来自主机写入的数据。 每个逻辑组包含来自预定义的一组订单逻辑地址的数据,并且具有小于块的固定大小。 通过将主机的逻辑地址空间划分为有序逻辑地址的非重叠子范围来获得逻辑组的总和,每个逻辑组在由至少一个页面的最小大小限定的范围内具有预定大小,并且 在块中拟合至少两个逻辑组的最大大小,高达主机写入的典型大小高达一个数量级。 以这种方式,避免了由于操作大的逻辑组而导致的过多垃圾收集,同时减少了地址空间以最小化缓存RAM的大小。

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