公开(公告)号：WO1996038914A1

公开(公告)日：1996-12-05

申请号：PCT/JP1995001084

申请日：1995-06-02

Applicant: HITACHI, LTD. ,  KAMIMAKI, Haruo ,  HATANO, Yuji ,  ONO, Koichi ,  OTSUKA, Masanori ,  HIRAKI, Mitsuru

Inventor： HITACHI, LTD.

IPC: H03K19/0175

CPC classification number: H03K19/0013 ,  G11C5/14

Abstract: A CMOS logic circuit which efficiently uses the relatively high power supply voltage of the system and consumes less electric power. The CMOS circuit is divided into a plurality of circuit blocks (5 and 6) and is formed on layers so as to divide the power supply voltage. A power supply voltage stabilizing unit (1) is provided for each layer and level converting circuits (7 and 8) for transferring signals. The power consumption of a system requiring a relatively high power supply voltage can be reduced without increasing the circuit scale by using a low-voltage CMOS logic circuit constituted of random logics, etc.

Abstract translation: CMOS逻辑电路有效地利用系统的较高电源电压并消耗较少的电力。 CMOS电路被分成多个电路块（5和6），并且形成在层上以便分开电源电压。 为每个用于传送信号的层和电平转换电路（7和8）提供电源稳压单元（1）。 可以通过使用由随机逻辑等构成的低电压CMOS逻辑电路来增加需要相对高的电源电压的系统的功耗而不增加电路规模。

公开(公告)号：WO1997014093A1

公开(公告)日：1997-04-17

申请号：PCT/JP1996002910

申请日：1996-10-07

Applicant: HITACHI, LTD. ,  NAKAGAWA, Tetsuya ,  HATANO, Yuji ,  SAGESAKA, Yasuhiro ,  BAJI, Toru ,  NOGUCHI, Koki

Inventor： HITACHI, LTD.

IPC: G06F09/30

CPC classification number: G06F9/3885 ,  G06F1/3203 ,  G06F15/7807

Abstract: For manufacturing a mobile communication terminal, reduction of the cost, power consumption, and size is a very important factor, and it is a major problem for the conventional technique in which two independent sets of DSPs and CPUs are used, because two systems of external memories are required. Further, since two systems of peripheral devices for data input/output are necessary for the DSPs and CPUs, there exists useless overhead between the DSPs and CPUs. A mobile communication terminal system is realized by using an integrated DSP/CPU chip having a DSP/CPU core (500) integrated as a single bus master, an integrated external bus interface (606) and an integrated peripheral circuit interface. Therefore, an inexpensive, low-power consumption, small-sized mobile communication terminal system is provided because the memory systems and peripheral circuits of the DSPs and CPUs are integrated.

Abstract translation: 对于制造移动通信终端，成本，功耗和尺寸的降低是非常重要的因素，对于使用两个独立的DSP和CPU组的传统技术来说，这是一个主要问题，因为两个外部系统 需要回忆 此外，由于用于数据输入/输出的外围设备的两个系统对于DSP和CPU是必要的，所以在DSP和CPU之间存在无用的开销。 通过使用具有集成为单总线主机的DSP / CPU核心（500），集成外部总线接口（606）和集成外围电路接口的集成DSP / CPU芯片来实现移动通信终端系统。 因此，由于DSP和CPU的存储器系统和外围电路被集成，所以提供了廉价的低功耗小型移动通信终端系统。