Abstract:
A digital sample clock generator (SCG) for generating a sample clock signal (SCLK) from an input signal (FD) derived from a drive measurement voltage signal (DMV) of a vibrating MEMS gyroscope (VMEMS) is described. The sample clock generator (SCG) has an oscillator (HFOSC) arranged to generate a master clock (MOSC) with a master clock period, a synchronization unit (SYN) arranged to detect a start of an input signal period (FR_PER) of the input signal (FD) and to, upon detecting the start, generate a synchronization pulse (FD_OSC) in synchronization with the master clock (MOSC), ), a counter unit (OSCCNTR) arrange to count master clock periods between subsequent synchronization pulses to obtain the number of master clock periods between subsequent synchronization pulses as a number count, a multiplier (MULT) arranged to multiply the number count with a pre-determined phase shift fraction (PhPerc) to obtain a number of trim periods, and a delay unit (DLY) arranged to generate the sample clock signal (SLCK) with a clock signal period (SCLK_PER) corresponding to the number count (CNT) and with a delay relative to the synchronization pulse corresponding to the number of trim periods (TRM). A drive-mode vibration gyroscope circuitry (VDCIRC) and a sense-mode vibration gyroscope circuitry (VSCIRC) are also described.
Abstract:
A method for rapidly and environmentally-friendly recovering valuable catalyst metal such as Co, Mn or so on from waste of terephthalic acid production is disclosed. The method comprises the steps of: adjusting pH of the waste of terephthalic acid production to 2.5 to 7; adding NaHCO3 slurry, which is prepared by mixing NaHCO3 and water, into a precipitation reactor, into which the waste of terephthalic acid production is added; heating a mixture of the waste of terephthalic acid production and NaHCO3 slurry; and separating a metal precipitate from the reaction mixture.
Abstract:
A capacitance-to-voltage interface circuit (400) is utilized to obtain a voltage corresponding to a detected capacitance differential, which may be associated with the operation of a capacitive sensing cell (402). The interface circuit (400) includes a capacitive sensing cell (402), an operational amplifier (408) adapted for selective coupling to the capacitive sensing cell (402), a feedback capacitor (412, 414) for the operational amplifier (408), a load capacitor (416, 418) for the operational amplifier (408), and a switching architecture (108) associated with the capacitive sensing cell (402), the operational amplifier (408), the feedback capacitor (412, 414), and the load capacitor (416, 418). During use, the switching architecture (108) reconfigures the capacitance-to-voltage interface circuit (400) for operation in a plurality of different phases. The different operational phases enable the single operational amplifier (408) to be used for both capacitance-to-voltage conversion and voltage amplification.
Abstract:
A capacitance-to-voltage interface circuit (400) is utilized to obtain a voltage corresponding to a detected capacitance differential, which may be associated with the operation of a capacitive sensing cell (402). The interface circuit (400) includes a capacitive sensing cell (402), an operational amplifier (408) adapted for selective coupling to the capacitive sensing cell (402), a feedback capacitor (412, 414) for the operational amplifier (408), a load capacitor (416, 418) for the operational amplifier (408), and a switching architecture (108) associated with the capacitive sensing cell (402), the operational amplifier (408), the feedback capacitor (412, 414), and the load capacitor (416, 418). During use, the switching architecture (108) reconfigures the capacitance-to-voltage interface circuit (400) for operation in a plurality of different phases. The different operational phases enable the single operational amplifier (408) to be used for both capacitance-to-voltage conversion and voltage amplification.