APPARATUS AND METHODS FOR CONTROLLING A SLEEP MODE IN A WIRELESS DEVICE
    1.
    发明申请
    APPARATUS AND METHODS FOR CONTROLLING A SLEEP MODE IN A WIRELESS DEVICE 审中-公开
    用于控制无线设备中的休眠模式的装置和方法

    公开(公告)号:WO2010030945A1

    公开(公告)日:2010-03-18

    申请号:PCT/US2009/056737

    申请日:2009-09-11

    Abstract: Apparatus and methods for controlling sleep mode in a wireless device are disclosed. The sleep mode is controlled using low power detection of RF beacon signals of known frequencies to reduce power consumption of the wireless device during sleep modes. Detection is achieved by using passive or low power elements in a receive chain that filters received signals allowing beacon signals of particular frequencies to pass,which are accumulated with passive or low power circuit elements requiring no external power source. The accumulated energy is compared to a threshold to determine the presence of the beacon with sleep circuitry. When the beacon is detected, the full RF receiver is triggered to wake up. Use of low power elements and passive elements, affords a beneficial increase in power savings for the wireless device, which is particularly helpful in wireless access points or relay stations that have an alternative power sourcing such as battery or solar power.

    Abstract translation: 公开了一种用于在无线设备中控制睡眠模式的装置和方法。 使用已知频率的RF信标信号的低功率检测来控制睡眠模式,以减少睡眠模式期间无线设备的功耗。 通过在接收链中使用无源或低功率元件来实现检测,所述无源或低功率元件对接收到的信号进行滤波,所述接收信号允许特定频率的信标信号通过,所述信号通过不需要外部电源的无源或低功率电路元件累积。 将累积的能量与阈值进行比较以确定具有睡眠电路的信标的存在。 当检测到信标时,触发完整的RF接收机唤醒。 使用低功率元件和无源元件,为无线设备的功率节省提供了有益的增加,这在具有替代电源(例如电池或太阳能)的无线接入点或中继站中特别有用。

    APPARATUS AND METHODS FOR CONTROLLING A SLEEP MODE IN A WIRELESS DEVICE
    2.
    发明申请
    APPARATUS AND METHODS FOR CONTROLLING A SLEEP MODE IN A WIRELESS DEVICE 审中-公开
    用于控制无线设备中的休眠模式的装置和方法

    公开(公告)号:WO2010030945A9

    公开(公告)日:2011-02-24

    申请号:PCT/US2009056737

    申请日:2009-09-11

    Abstract: Apparatus and methods for controlling sleep mode in a wireless device are disclosed. The sleep mode is controlled using low power detection of RF beacon signals of known frequencies to reduce power consumption of the wireless device during sleep modes. Detection is achieved by using passive or low power elements in a receive chain that filters received signals allowing beacon signals of particular frequencies to pass,which are accumulated with passive or low power circuit elements requiring no external power source. The accumulated energy is compared to a threshold to determine the presence of the beacon with sleep circuitry. When the beacon is detected, the full RF receiver is triggered to wake up. Use of low power elements and passive elements, affords a beneficial increase in power savings for the wireless device, which is particularly helpful in wireless access points or relay stations that have an alternative power sourcing such as battery or solar power.

    Abstract translation: 公开了一种用于在无线设备中控制睡眠模式的装置和方法。 使用已知频率的RF信标信号的低功率检测来控制睡眠模式,以减少睡眠模式期间无线设备的功耗。 通过在接收链中使用无源或低功率元件来实现检测,该接收链对接收到的信号进行滤波,允许特定频率的信标信号通过,这些信号是不需要外部电源的无源或低功率电路元件。 将累积的能量与阈值进行比较以确定具有睡眠电路的信标的存在。 当检测到信标时,触发完整的RF接收机唤醒。 使用低功率元件和无源元件,为无线设备的功率节省提供了有益的增加,这在具有替代电源(例如电池或太阳能)的无线接入点或中继站中特别有用。

    DIRECT CURRENT (DC) OFFSET CORRECTION USING ANALOG-TO-DIGITAL CONVERSION
    3.
    发明申请
    DIRECT CURRENT (DC) OFFSET CORRECTION USING ANALOG-TO-DIGITAL CONVERSION 审中-公开
    使用模拟数字转换的直接电流(DC)偏移校正

    公开(公告)号:WO2010014756A1

    公开(公告)日:2010-02-04

    申请号:PCT/US2009/052161

    申请日:2009-07-29

    CPC classification number: H04L25/061 H04L27/364

    Abstract: Techniques for reducing or eliminating DC (direct current) offset in transmitters are disclosed. An apparatus for DC offset reduction may include a converter, a digital engine, and a plurality of programmable current supplies. The converter is configured to provide digital representations of a plurality of DC currents associated, respectively, with a plurality of differential signal legs. The digital engine is configured to receive the digital representations and to produce instructions for generating compensating currents for the plurality of differential signal legs based on comparisons, respectively, between each of the digital representations and a calibration current. The programmable current supplies correspond, respectively, to the differential signal legs. The current supplies are configured to inject the compensating currents into the differential signal legs, respectively, to reduce DC offset between the differential signal legs, based upon the instructions. The instructions allow one-shot DC offset correction, instead of successive approximation for DC offset correction.

    Abstract translation: 公开了用于减少或消除发射机中的DC(直流)偏移的技术。 用于DC偏移减小的装置可以包括转换器,数字引擎和多个可编程电流源。 转换器被配置为提供分别与多个差分信号支路相关联的多个DC电流的数字表示。 数字引擎被配置为接收数字表示并且基于分别在每个数字表示和校准电流之间的比较来产生用于产生用于多个差分信号支路的补偿电流的指令。 可编程电流电源分别对应于差分信号支路。 当前电源被配置为分别将补偿电流注入到差分信号支路中,以基于指令减小差分信号支路之间的DC偏移。 该指令允许单次直流偏移校正,而不是逐次逼近直流偏移校正。

    RF TRANSCEIVER IC HAVING INTERNAL LOOPBACK CONDUCTOR FOR IP2 SELF TEST
    4.
    发明申请
    RF TRANSCEIVER IC HAVING INTERNAL LOOPBACK CONDUCTOR FOR IP2 SELF TEST 审中-公开
    具有IP2自检功能的内部回路导线器的射频收发器IC

    公开(公告)号:WO2010057035A1

    公开(公告)日:2010-05-20

    申请号:PCT/US2009/064454

    申请日:2009-11-13

    CPC classification number: H04B1/40 H03D7/168

    Abstract: An RF transceiver integrated circuit has a novel segmented, low parasitic capacitance, internal loopback conductor usable for conducting IP2 self testing and/or calibration. In a first novel aspect, the transmit mixer of the transceiver is a current mode output mixer. The receive mixer is a passive mixer that has a low input impedance. In the loopback mode, the transmit mixer drives a two tone current signal to the passive mixer via the loopback conductor. In a second novel aspect, only one quadrature branch of the transmit mixer is used to generate both tones required for carrying out an IP2 test. In a third novel aspect, a first calibration test is performed using one quadrature branch of the transmit mixer at the same time that a second calibration test is performed using the other quadrature branch, thereby reducing loopback test time and power consumption.

    Abstract translation: RF收发器集成电路具有新颖的分段,低寄生电容,可用于进行IP2自检和/或校准的内部环回导体。 在第一个新颖的方面,收发器的发射混频器是电流模式输出混频器。 接收混频器是具有低输入阻抗的无源混频器。 在环回模式下,发射混频器通过环回导体将两声音电流信号驱动到无源混频器。 在第二个新颖的方面,发射混频器只有一个正交分支用于产生执行IP2测试所需的两个音调。 在第三个新颖的方面,使用发射混频器的一个正交分支进行第一校准测试,同时使用其他正交分支执行第二校准测试,从而减少环回测试时间和功耗。

    DRIVER AMPLIFIER HAVING A PROGRAMMABLE OUTPUT IMPEDANCE ADJUSTMENT CIRCUIT
    5.
    发明申请
    DRIVER AMPLIFIER HAVING A PROGRAMMABLE OUTPUT IMPEDANCE ADJUSTMENT CIRCUIT 审中-公开
    具有可编程输出阻抗调整电路的驱动放大器

    公开(公告)号:WO2010014802A1

    公开(公告)日:2010-02-04

    申请号:PCT/US2009/052243

    申请日:2009-07-30

    CPC classification number: H03F1/56

    Abstract: A driver amplifier in an integrated circuit is suitable for driving a signal onto an output node and through an output terminal, and through a matching network to a power amplifier. A novel Programmable Output Impedance Adjustment Circuit (POIAC) within the integrated circuit is coupled to the output node and affects an output impedance looking into the output terminal. When the output impedance would otherwise change (for example, due to a driver amplifier power gain change), the POIAC adjusts how it loads the output node such that the output impedance remains substantially constant. The POIAC uses a series-connected inductor and capacitor L-C-R circuit to load the output node, thereby reducing the amount of capacitance and die area required to perform multi-band impedance matching with a power amplifier. Multi-band operation is accomplished by changing an effective capacitance in the L-C-R circuit depending on communication band information received by the POIAC.

    Abstract translation: 集成电路中的驱动放大器适用于将信号驱动到输出节点上,并通过输出端,并通过匹配网络到功率放大器。 集成电路内的新型可编程输出阻抗调整电路(POIAC)耦合到输出节点并影响输出端子的输出阻抗。 当输出阻抗否则会改变(例如,由于驱动器放大器功率增益变化)时,POIAC调整如何加载输出节点,使得输出阻抗基本保持不变。 POIAC使用串联电感器和电容器L-C-R电路来加载输出节点,从而减少与功率放大器执行多频带阻抗匹配所需的电容量和管芯面积。 通过根据POIAC接收的通信频带信息改变L-C-R电路中的有效电容来实现多频带操作。

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