公开(公告)号：WO1996007969A1

公开(公告)日：1996-03-14

申请号：PCT/CA1995000517

申请日：1995-09-08

Applicant: LAI, Bosco, C., S.

IPC: G06F11/10

CPC classification number: G06F11/1044 ,  G11C29/88

Abstract: This invention includes an algorithm, which detects and identifies the error in each memory address of the Reduced Specification Integrated Memory chips (RSIMC). RSIMC with the same error pattern will then be grouped together along with the Error Correction Apparatus (ECA) for assembly into memory modules. ECA employs the redundant Error Correcting Algorithm which enables the rejected, fallout, audio grade, toy grade and other reduced specification memory chips to become computer grade compatible, such that the corrected RSIMC memory modules would function as normal memory modules for computer (or computer sub-systems) usages and applications.

Abstract translation: 本发明包括一种算法，其检测并识别精简规范集成存储器芯片（RSIMC）的每个存储器地址中的错误。 然后将具有相同错误模式的RSIMC与用于组装到存储器模块中的误差校正装置（ECA）一起分组在一起。 ECA采用冗余的纠错算法，使得被拒绝，落下，音频等级，玩具等级和其他减少规格的存储器芯片变得与计算机级兼容，使得校正的RSIMC存储器模块将用作计算机（或计算机子 系统）用法和应用程序。

公开(公告)号：WO0229824A3

公开(公告)日：2003-05-01

申请号：PCT/CA0101365

申请日：2001-09-26

Applicant: CONCORD IDEA CORP ,  LAI BOSCO

Inventor： LAI BOSCO

IPC: G01R31/3183 ,  G01R31/28 ,  G11C29/48 ,  G01R31/319 ,  G01R31/3193 ,  G06F11/277 ,  G11C29/00

CPC classification number: G11C29/48

Abstract: The invention disclosed herein is a system and method for testing integrated circuit devices, including memory chips. The devices under test are subject to behavioural testing, in which a copy of signals in an application system is directed to the device under test, or to an electronic component connected to the device under test. This permits the device under test to be tested under the operating conditions of the application system, which is preferably similar to the actual application environment in which the device under test will ultimately be used. Conventional tests, including pattern testing and/or parametric tests, may also be performed on devices under test, if desired.

Abstract translation: 本文公开的发明是用于测试包括存储器芯片的集成电路器件的系统和方法。 被测设备将进行行为测试，其中应用系统中的信号副本被引导到被测设备，或连接到被测设备的电子部件。 这允许在应用系统的操作条件下测试被测设备，其优选地类似于将最终使用被测设备的实际应用环境。 如果需要，常规测试，包括模式测试和/或参数测试也可以在被测设备上进行。