公开(公告)号：WO1997008609A1

公开(公告)日：1997-03-06

申请号：PCT/US1996012515

申请日：1996-07-31

Applicant: MOTOROLA INC. ,  LLOYD, Scott, Edward ,  PAN, ShaoWei ,  WANG, Shay-Ping, Thomas

Inventor： MOTOROLA INC.

IPC: G06F07/00

CPC classification number: G06F7/4833 ,  G06F1/0307 ,  G06F7/5235 ,  G06F17/10 ,  G06F2207/3884

Abstract: A computer processor that performs operations in a logarithmic number system (LNS) domain includes a log converter (20) which generates log signals, a data pipeline (22), a plurality of processing elements (231a-f) coupled to respective stages (24a-d) of the data pipeline, an inverse-log converter (28), and a programmable accumulator (232) that performs various summing operations to produce an output signal. An instruction, selected from a set of instructions, is decoded by a control unit (234) to configure the computer processor to perform operations on one or more data streams. Mathematical operations that can be performed by the processor include matrix multiplication, matrix-inversion, fast Fourier transforms (FFT), auto-correlation, cross-correlation, discrete cosine transforms (DCT), polynomial equations, and difference equations in general, such as those used to approximate infinite impulse response (IIR) and finite impulse response (FIR) filters. The computer processor can be used as a co-processor (340) in a general purpose computer system.

Abstract translation: 在对数数字系统（LNS）域中执行操作的计算机处理器包括生成日志信号的对数转换器（20），数据流水线（22），耦合到各个级（24a）的多个处理元件（231a-f） -d），反向对数转换器（28）和可编程累加器（232），其执行各种求和操作以产生输出信号。 从一组指令中选择的指令由控制单元（234）解码，以配置计算机处理器对一个或多个数据流执行操作。 可以由处理器执行的数学运算包括矩阵乘法，矩阵反转，快速傅里叶变换（FFT），自相关，互相关，离散余弦变换（DCT），多项式方程和一般的差分方程，如 用于近似无限脉冲响应（IIR）和有限脉冲响应（FIR）滤波器的那些。 计算机处理器可以用作通用计算机系统中的协处理器（340）。

公开(公告)号：WO1996028783A1

公开(公告)日：1996-09-19

申请号：PCT/US1996001063

申请日：1996-01-16

Applicant: MOTOROLA INC. ,  LLOYD, Scott, Edward

Inventor： MOTOROLA INC.

IPC: G06F15/16

CPC classification number: G06F8/445

Abstract: A method for storing instructions in a computer memory (106) is provided. The method is utilized in a multiprocessor computer which includes a plurality of processing elements (108, 110, 112). Instructions are stored in the computer memory (106) so that the processing elements (108, 110, 112) produce outputs according to an execution schedule.

Abstract translation: 提供了一种用于在计算机存储器（106）中存储指令的方法。 该方法在包括多个处理元件（108,110,112）的多处理器计算机中使用。 指令被存储在计算机存储器（106）中，使得处理元件（108,110,112）根据执行时间表产生输出。

公开(公告)号：WO1997008607A1

公开(公告)日：1997-03-06

申请号：PCT/US1996011511

申请日：1996-07-08

Applicant: MOTOROLA INC. ,  LLOYD, Scott, Edward ,  PAN, ShaoWei ,  WANG, Shay-Ping, Thomas

Inventor： MOTOROLA INC.

IPC: G06F07/00

CPC classification number: G06F7/4833 ,  G06F7/49 ,  G06F2207/3884

Abstract: A computer processor that performs operations in a logarithmic number system (LNS) domain includes an input log converter (20), a feedback log converter (303), a first data pipeline (304), a second data pipeline (306), a plurality of processing elements (26a-f) coupled to respective stages of the data pipelines, an inverse-log converter (28), and a programmable accumulator (232) which produces output signals. An instruction, selected from a set of instructions, is decoded by a control unit (235) to configure the computer processor to perform operations on one or more data streams. Mathematical operations that can be performed by the processor include matrix multiplication, matrix-inversion, fast Fourier transforms (FFT), auto-correlation, cross-correlation, discrete cosine transforms (DCT), polynomial equations, and difference equations in general, such as those used to approximate infinite impulse response (IIR) and finite impulse response (FIR) filters. The computer processor can be used as a coprocessor (340) in a general purpose computer system.

Abstract translation: 执行对数系统（LNS）域中的操作的计算机处理器包括输入日志转换器（20），反馈日志转换器（303），第一数据流水线（304），第二数据流水线（306），多个 耦合到数据管线的各个级的处理元件（26a-f），反向对数转换器（28）和产生输出信号的可编程累加器（232）。 从一组指令中选择的指令由控制单元（235）解码，以配置计算机处理器对一个或多个数据流执行操作。 可以由处理器执行的数学运算包括矩阵乘法，矩阵反转，快速傅里叶变换（FFT），自相关，互相关，离散余弦变换（DCT），多项式方程和一般的差分方程，如 用于近似无限脉冲响应（IIR）和有限脉冲响应（FIR）滤波器的那些。 计算机处理器可以用作通用计算机系统中的协处理器（340）。

公开(公告)号：WO1996028774A1

公开(公告)日：1996-09-19

申请号：PCT/US1996000955

申请日：1996-01-29

Applicant: MOTOROLA INC. ,  BUSS, John, Michael ,  DWORKIN, James ,  LLOYD, Scott, Edward ,  PAN, Shao, Wei ,  SMITH, Stephen, L. ,  WANG, Shay-Ping, Thomas

Inventor： MOTOROLA INC.

IPC: G06F01/02

CPC classification number: G06F7/556

Abstract: A circuit and method for computing an exponential signal x is provided. The circuit includes a logarithm converter (4) which converts an input signal to binary word that represents the logarithm of an input signal x. A first shift register shifts (8) the binary word in a bit-wise fashion to produce a first intermediate value; while a second shift register (28) shifts the binary word in a bit-wise fashion to produce a second intermediate value. The shift registers may be implemented using multiplexers. The shifting operations are equivalent to multiplying the intermediate values by a factor which is a power of two. The first intermediate value is either added to or subtracted from the second intermediate value to produce a combined value. An inverse-logarithm converter (34) converts the combined value to the exponential signal.

Abstract translation: 提供了一种用于计算指数信号x 的电路和方法。 电路包括将输入信号转换为表示输入信号x的对数的二进制字的对数转换器（4）。 第一移位寄存器以逐位方式移位（8）二进制字以产生第一中间值; 而第二移位寄存器（28）以逐位方式移位二进制字以产生第二中间值。 移位寄存器可以使用多路复用器来实现。 换档操作等效于将中间值乘以2的幂。 将第一中间值添加到第二中间值或从第二中间值中减去以产生组合值。 逆对数转换器（34）将组合值转换为指数信号。

公开(公告)号：WO1997012332A1

公开(公告)日：1997-04-03

申请号：PCT/US1996014017

申请日：1996-08-29

Applicant: MOTOROLA INC. ,  PAN, Shao, Wei ,  WANG, Shay-Ping, Thomas ,  LLOYD, Scott, Edward

Inventor： MOTOROLA INC.

IPC: G06F17/15

CPC classification number: G06F17/15 ,  G06F7/4833

Abstract: A method and system for a correlation operation in a digital signal processor (DSP) are provided. The correlation operation is performed in a logarithmic number system (LNS) domain. The DSP includes a plurality of processing elements (26a-d) that executes the correlation operation in a highly parallel fashion. The method can be implemented as a software program that directs a LNS based DSP to execute the correlation operation.

Abstract translation: 提供了一种用于数字信号处理器（DSP）中的相关操作的方法和系统。 相关操作在对数系统（LNS）域中执行。 DSP包括以高度并行的方式执行相关操作的多个处理元件（26a-d）。 该方法可以实现为指导基于LNS的DSP执行相关操作的软件程序。

公开(公告)号：WO1997012331A1

公开(公告)日：1997-04-03

申请号：PCT/US1996014015

申请日：1996-08-29

Applicant: MOTOROLA INC. ,  PAN, Shao, Wei ,  LLOYD, Scott, Edward

Inventor： MOTOROLA INC.

IPC: G06F17/15

CPC classification number: G06F17/15 ,  G06F7/4833

Abstract: A method and system for a convolution operation in a digital signal processor (DSP) are provided. The convolution operation is performed in a logarithmic number system (LNS) domain. The DSP includes a plurality of processing elements (26a-d) that executes the convolution in a highly parallel fashion. The method can be implemented as a software program that directs a LNS based DSP to execute the convolution operation.

Abstract translation: 提供了一种用于数字信号处理器（DSP）中的卷积运算的方法和系统。 卷积操作在对数数字系统（LNS）域中执行。 DSP包括以高度并行的方式执行卷积的多个处理元件（26a-d）。 该方法可以实现为指导基于LNS的DSP执行卷积运算的软件程序。