公开(公告)号：WO2010000746A1

公开(公告)日：2010-01-07

申请号：PCT/EP2009/058201

申请日：2009-06-30

Applicant: NXP B.V. ,  PAVLOVIC, Nenad ,  COLLADOS ASENSIO, Manel ,  HE, Xin ,  VAN SINDEREN, Jan

Inventor： PAVLOVIC, Nenad ,  COLLADOS ASENSIO, Manel ,  HE, Xin ,  VAN SINDEREN, Jan

IPC: H03D13/00 ,  H03L7/091

CPC classification number: H03L7/085 ,  H03L7/091

Abstract: Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit (20) of a time to digital converter between a normal operating mode or a calibration mode. A delay circuit (22) with a delay circuit input and a plurality of taps outputs respective, differently delayed versions of a signal from a delay circuit input. A sampling register (24) has data inputs coupled to the taps, and samples data from the data inputs in response to an active transition at a clock input. When in the normal operating mode, the feed circuit (2) feeds an oscillator signal of an oscillator circuit (10) to the delay circuit input and a reference signal to the clock input of the sampling register (24). When in the calibration mode, the feed circuit (20) supplies signals with transitions having timing controlled by the oscillator signal to both the delay circuit input and the clock input. The feed circuit (20) provides for selection of transitions of the oscillator signal that control timing of a first active transition at the clock circuit after a transition at the delay circuit input. A control circuit (28) switches the feed circuit between the normal operating mode and the calibration mode, and controls the feed circuit (20) successively to select a plurality of different transitions to control timing of the first active transition in the calibration mode. The control circuit reads out resulting data from the sampling register (24) for each selection and determine calibration data for the oscillator signal from said data.

Abstract translation: 通过在正常操作模式或校准模式之间切换时间到数字转换器的馈电电路（20）来获得校准数字转换时间的校准数据。 具有延迟电路输入和多个抽头的延迟电路（22）输出来自延迟电路输入的信号的相应不同延迟的版本。 采样寄存器（24）具有耦合到抽头的数据输入，并响应于在时钟输入处的有源转换从数据输入端采样数据。 当处于正常工作模式时，馈电电路（2）将振荡器电路（10）的振荡器信号馈送到延迟电路输入端，并将参考信号馈送到采样寄存器（24）的时钟输入端。 当处于校准模式时，馈电电路（20）将具有由振荡器信号控制的定时的转换信号提供给延迟电路输入和时钟输入。 馈电电路（20）提供选择振荡器信号的转换，该振荡器信号在延迟电路输入的转变之后控制时钟电路处的第一有源跃迁的定时。 控制电路（28）在正常操作模式和校准模式之间切换供电电路，并且连续地控制馈电电路（20）以选择多个不同的转变以控制校准模式中的第一主动转换的定时。 控制电路从每个选择的采样寄存器（24）中读出结果数据，并根据所述数据确定振荡器信号的校准数据。

公开(公告)号：WO2010029454A1

公开(公告)日：2010-03-18

申请号：PCT/IB2009/053704

申请日：2009-08-24

Applicant: NXP B.V. ,  PAVLOVIC, Nenad ,  COLLADOS, Manel ,  HE, Xin ,  VAN SINDEREN, Jan

Inventor： PAVLOVIC, Nenad ,  COLLADOS, Manel ,  HE, Xin ,  VAN SINDEREN, Jan

IPC: H04L27/36

CPC classification number: H04L27/361 ,  H04L27/2627 ,  H04L2027/0018 ,  H04L2027/0067

Abstract: The present application relates to at least one digitally controlled oscillator and a data modulation device. More particularly, the digital polar transmitter comprises at least one digitally controlled oscillator configured to generate at least one frequency. The digital polar transmitter comprises a data modulation device, wherein the data modulation device comprises at least one data input terminal, at least one output terminal, and at least one frequency input terminal, wherein the output terminal is connected to the digitally controlled oscillator. The digital polar transmitter comprises a phase measuring device configured to measure phase information from the output signal of the data modulation device for every frequency sample. The digital polar transmitter comprises a phase error detecting device configured to detect a phase error at least depending on the measured phase information, wherein the phase error detecting device is configured to apply the detected phase error to the output signal of the data modulation device.

Abstract translation: 本申请涉及至少一个数字控制振荡器和数据调制装置。 更具体地，数字极化发射器包括被配置为产生至少一个频率的至少一个数字控制振荡器。 数字极性发射机包括数据调制装置，其中数据调制装置包括至少一个数据输入端，至少一个输出端和至少一个频率输入端，其中输出端与数控振荡器相连。 数字极化发射机包括相位测量装置，其被配置为针对每个频率样本从数据调制装置的输出信号测量相位信息。 数字极性发射机包括相位误差检测装置，其被配置为至少根据所测量的相位信息检测相位误差，其中相位误差检测装置被配置为将检测到的相位误差应用于数据调制装置的输出信号。

公开(公告)号：WO2010003864A2

公开(公告)日：2010-01-14

申请号：PCT/EP2009058282

申请日：2009-07-01

Applicant: NXP BV ,  COLLADOS ASENSIO MANEL ,  HE XIN ,  PAVLOVIC NENAD ,  SINDEREN JAN VAN

Inventor： COLLADOS ASENSIO MANEL ,  HE XIN ,  PAVLOVIC NENAD

IPC: H03C5/00

CPC classification number: H03C5/00

Abstract: The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.

Abstract translation: 本申请涉及一种数字调制器，其包括包括多个单元阵列的输出级和采样级。 本申请还涉及包括所述数字调制器，数字调制方法和计算机程序产品的通信设备。 更具体地，数字调制器包括包括多个单元阵列的输出级，其中输出级包括被配置为接收载波频率信号的至少一个载波频率信号输入端。 数字调制器包括可连接到输出级的采样级，其中采样级被配置为对至少一个数据输入信号进行过采样。 数字调制器包括至少一个采样时钟产生装置，其被配置为根据排列的单元阵列的数量和载波频率信号产生至少一个采样时钟信号。

公开(公告)号：WO2009113000A2

公开(公告)日：2009-09-17

申请号：PCT/IB2009050960

申请日：2009-03-09

Applicant: NXP BV ,  HE XIN ,  COLLADOS ASENSIO MANEL ,  PAVLOVIC NENAD ,  VAN SINDEREN JAN

Inventor： HE XIN ,  COLLADOS ASENSIO MANEL ,  PAVLOVIC NENAD ,  VAN SINDEREN JAN

IPC: H04B1/04

CPC classification number: H04B1/0483

Abstract: An output stage (1) for a digital RF transmitter is provided. The output stage comprises: an input adapted to receive an input signal (RFin, b7-b0) to be transmitted; a plurality N of power amplification sections (S1, S2, S3, S4); and an output (A, B) providing an output voltage signal. Each of the N power amplification sections (S1, S2, S3, S4) is arranged to receive the input signal (RFin, b7-b0) and comprises a transformer (T1, T2, T3, T4) adapted to provide a respective output signal. Each transformer comprises a primary stage and a secondary stage; the secondary stages of the transformers (T1, T2, T3, T4) of the N power amplification sections (S1, S2, S3, S4) are combined such that a combined output voltage signal of the output stage is provided. The N power amplification sections (S1, S2, S3, S4) are adapted such that the input signal (RFin, b7-b0) is latched by clock signals (clock1, clock2, clock3, clock4) comprising different phases.

Abstract translation: 提供了一种用于数字RF发射器的输出级（1）。 输出级包括：适于接收要发送的输入信号（RFin，b7-b0）的输入; 多个N个功率放大部分（S1，S2，S3，S4）; 以及提供输出电压信号的输出（A，B）。 N个功率放大部分（S1，S2，S3，S4）中的每一个被布置成接收输入信号（RFin，b7-b0），并且包括适于提供相应输出信号的变压器（T1，T2，T3，T4） 。 每个变压器包括初级和次级级; N个功率放大部（S1，S2，S3，S4）的变压器（T1，T2，T3，T4）的次级组合，从而提供输出级的组合输出电压信号。 N个功率放大部分（S1，S2，S3，S4）被适配成使得输入信号（RFin，b7-b0）被包括不同相位的时钟信号（clock1，clock2，clock3，clock4）锁存。

公开(公告)号：WO2008001269A2

公开(公告)日：2008-01-03

申请号：PCT/IB2007/052348

申请日：2007-06-19

Applicant: NXP B.V. ,  COLLADOS ASENSIO, Manel ,  PAVLOVIC, Nenad ,  VIDOJKOVIC, Vojkan ,  VAN ZEIJL, Paulus, T., M.

Inventor： COLLADOS ASENSIO, Manel ,  PAVLOVIC, Nenad ,  VIDOJKOVIC, Vojkan ,  VAN ZEIJL, Paulus, T., M.

IPC: H04L27/36

CPC classification number: H04L27/361 ,  H03C5/00

Abstract: The present invention relates to a polar transmission method and a polar transmitter for transmitting phase and amplitude components derived from in-phase (I) and quadrature-phase (Q) components of an input signal. A first conversion is provided for converting the in-phase (I) and quadrature-phase (Q) components into the phase and amplitude components at a first sampling rate. Additionally, a second conversion is provided for converting the phase component into a frequency component, wherein the second conversion comprises a rate conversion for converting the first sampling rate into a lower second sampling rate at which the frequency component is provided. Thereby, the second sampling rate can be used as a lower update rate in a digitally controlled oscillator in order to save power or because of speed limitations, while the surplus phase samples obtain due to the higher first sampling rate enable better approximation of the phase component after the digitally controlled oscillator. This better approximation accounts for a cleaner spectrum around the synthesized channel.

Abstract translation: 本发明涉及一种用于发送从输入信号的同相（I）和正交相（Q）分量导出的相位和幅度分量的极性传输方法和极性发射器。 提供了第一转换，用于以第一采样率将同相（I）和正交相（Q）分量转换成相位和幅度分量。 另外，提供了将相位分量转换成频率分量的第二转换，其中第二转换包括用于将第一采样率转换成提供频率分量的较低第二采样率的速率转换。 因此，为了节省功率或由于速度限制，第二采样率可以用作数字控制振荡器中的较低更新速率，而由于较高的第一采样率而获得的剩余相位采样使得能够更好地近似相位分量 数字控制振荡器后。 这个更好的近似解释了合成通道周围更清晰的频谱。

公开(公告)号：WO2005029715A1

公开(公告)日：2005-03-31

申请号：PCT/IB2004/051786

申请日：2004-09-17

Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V. ,  LEENAERTS, Dominicus, M., W. ,  JEURISSEN, Gerardus, M., D. ,  PAVLOVIC, Nenad

Inventor： LEENAERTS, Dominicus, M., W. ,  JEURISSEN, Gerardus, M., D. ,  PAVLOVIC, Nenad

IPC: H04B1/04

CPC classification number: H03G1/0023 ,  H03F3/45089 ,  H03F2203/45544 ,  H03F2203/45561 ,  H03F2203/45594 ,  H03F2203/45638 ,  H04B2001/0416

Abstract: The present invention relates to a method a circuit for power amplification of an IF signal by means of a Gilbert mixer which is coupled to a power amplifier. The Gilbert mixer is directly coupled to a local oscillator which causes conversion gain variations of the Gilbert mixer. The conversion gain variations are compensated by controlling of the gain of the power amplifier correspondingly.

Abstract translation: 本发明涉及一种通过耦合到功率放大器的吉尔伯特混频器对IF信号进行功率放大的电路的方法。 吉尔伯特混频器直接耦合到本地振荡器，这导致吉尔伯特混频器的转换增益变化。 通过相应地控制功率放大器的增益来补偿转换增益变化。

公开(公告)号：WO2010003864A3

公开(公告)日：2010-01-14

申请号：PCT/EP2009/058282

申请日：2009-07-01

Applicant: NXP B.V. ,  COLLADOS ASENSIO, Manel ,  HE, Xin ,  PAVLOVIC, Nenad ,  VAN SINDEREN, Jan

Inventor： COLLADOS ASENSIO, Manel ,  HE, Xin ,  PAVLOVIC, Nenad

IPC: H03C5/00

Abstract: The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.

公开(公告)号：WO2007144806A3

公开(公告)日：2007-12-21

申请号：PCT/IB2007/052127

申请日：2007-06-06

Applicant: NXP B.V. ,  COLLADOS ASENSIO, Manel ,  PAVLOVIC, Nenad ,  VIDOJKOVIC, Vojkan ,  VAN ZEIJL, Paulus, T., M.

Inventor： COLLADOS ASENSIO, Manel ,  PAVLOVIC, Nenad ,  VIDOJKOVIC, Vojkan ,  VAN ZEIJL, Paulus, T., M.

IPC: H03C3/40

Abstract: The present invention relates to a polar signal generator and method of deriving phase and amplitude components from in-phase (I) and quadrature-phase (Q) components of an input signal, wherein the I and Q components are generated at a first sampling frequency based on the input signal, and are then up-sampled in accordance with a predetermined first interpolation factor (N), to generate up-sampled I and Q components at a second sampling frequency higher than the first sampling frequency. The up-sampled I and Q components are converted into the phase and amplitude components, wherein the converting step is operated at the second sampling frequency. Moreover, the phase and amplitude components can be further up-sampled, optionally by different sampling frequencies, to a third and a fourth sampling frequency. Thereby, I-Q generation and cartesian-to -polar transformation can be performed at lower frequencies, which reduces power consumption.

公开(公告)号：WO2009121861A3

公开(公告)日：2010-07-08

申请号：PCT/EP2009053782

申请日：2009-03-31

Applicant: NXP BV ,  HE XIN ,  VAN SINDEREN JAN ,  COLLADOS ASENSIO MANEL ,  PAVLOVIC NENAD

Inventor： HE XIN ,  VAN SINDEREN JAN ,  COLLADOS ASENSIO MANEL ,  PAVLOVIC NENAD

IPC: H03D7/14 ,  H03G1/00 ,  H03G3/30

CPC classification number: H03D7/1441 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/165 ,  H03D2200/0019 ,  H03D2200/0084 ,  H03D2200/009 ,  H03G1/0088

Abstract: The present application relates to a radio frequency modulator comprising at least two unit cells, wherein at least one unit cell comprises a local oscillator input terminal. The at least one unit cell is configured to generate at least one up-converted output signal depending on a local oscillator signal. The at least one unit cell comprises at least one data input terminal, wherein the data input terminal is arranged to receive at least a first data signal. The at least one unit cell is configured such that the generating of the up-converted output signal is deactivatable at least depending on the first data signal. The present application relates also to a transmitter, a method for generating an up-converted output signal and a computer readable medium having a computer program stored thereon.

Abstract translation: 本申请涉及一种包括至少两个单元的射频调制器，其中至少一个单元包括本地振荡器输入端。 所述至少一个单元单元被配置为根据本地振荡器信号产生至少一个上变频输出信号。 所述至少一个单元单元包括至少一个数据输入端，其中所述数据输入端被布置为接收至少第一数据信号。 至少一个单元单元被配置为使得上变频输出信号的产生至少取决于第一数据信号而失活。 本申请还涉及发射机，用于产生上变频输出信号的方法和其上存储有计算机程序的计算机可读介质。

公开(公告)号：WO2009138825A1

公开(公告)日：2009-11-19

申请号：PCT/IB2008/054705

申请日：2008-11-10

Applicant: SONY ERICSSON MOBILE COMMUNICATIONS AB ,  RAKIC, Milan ,  PAVLOVIC, Nenad

Inventor： RAKIC, Milan ,  PAVLOVIC, Nenad

IPC: H04L29/06 ,  H04L29/08 ,  H04W12/06 ,  G06F21/00 ,  H04W4/12 ,  H04W88/02 ,  H04W88/16

CPC classification number: H04L63/12 ,  H04W12/06

Abstract: A device may receive a secure push message from an administrator device. In addition, the device may generate a first key by combining an administrator code, a client device identifier that identifies a client device, and subscriber information that is associated with a service to which a user subscribes. In addition, the device may hash the first key to generate a second key, and use the second key to sign a data block within the secure push message to produce an electronic signature. Further, the device may validate the secure push message based on the electronic signature.

Abstract translation: 设备可以从管理员设备接收安全推送消息。 此外，设备可以通过组合管理员代码，标识客户端设备的客户端设备标识符和与用户订阅的服务相关联的订户信息来生成第一密钥。 另外，设备可以对第一密钥进行散列以生成第二密钥，并且使用第二密钥对安全推送消息内的数据块进行签名以产生电子签名。 此外，设备可以基于电子签名验证安全推送消息。