公开(公告)号：WO2010003864A3

公开(公告)日：2010-01-14

申请号：PCT/EP2009/058282

申请日：2009-07-01

Applicant: NXP B.V. ,  COLLADOS ASENSIO, Manel ,  HE, Xin ,  PAVLOVIC, Nenad ,  VAN SINDEREN, Jan

Inventor： COLLADOS ASENSIO, Manel ,  HE, Xin ,  PAVLOVIC, Nenad

IPC: H03C5/00

Abstract: The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.

公开(公告)号：WO2009115989A2

公开(公告)日：2009-09-24

申请号：PCT/IB2009/051131

申请日：2009-03-17

Applicant: NXP B.V. ,  DE JONG, Gerben, W. ,  COLLADOS ASENSIO, Manel

Inventor： DE JONG, Gerben, W. ,  COLLADOS ASENSIO, Manel

CPC classification number: H03D7/166 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1466 ,  H03D7/1483 ,  H03D2200/0084

Abstract: The present application relates to an apparatus comprising a low-noise mixing unit, and more particularly to a receiver comprising the apparatus. The apparatus comprises a mixing unit configured to frequency down convert an input signal. The mixing unit comprises a number of switching units. The apparatus encompasses a generating unit configured to generate at least one local oscillator signal. The generating unit is configured to drive the number of switching units such that a maximum of one of the switching units is conductive at a certain time.

Abstract translation: 本申请涉及一种包括低噪声混合单元的装置，更具体地涉及包括该装置的接收机。 该装置包括被配置为降频转换输入信号的混合单元。 混合单元包括多个开关单元。 该装置包括被配置为产生至少一个本地振荡器信号的生成单元。 生成单元被配置为驱动开关单元的数量，使得最多一个开关单元在一定时间导通。

公开(公告)号：WO2007144806A3

公开(公告)日：2007-12-21

申请号：PCT/IB2007/052127

申请日：2007-06-06

Applicant: NXP B.V. ,  COLLADOS ASENSIO, Manel ,  PAVLOVIC, Nenad ,  VIDOJKOVIC, Vojkan ,  VAN ZEIJL, Paulus, T., M.

Inventor： COLLADOS ASENSIO, Manel ,  PAVLOVIC, Nenad ,  VIDOJKOVIC, Vojkan ,  VAN ZEIJL, Paulus, T., M.

IPC: H03C3/40

Abstract: The present invention relates to a polar signal generator and method of deriving phase and amplitude components from in-phase (I) and quadrature-phase (Q) components of an input signal, wherein the I and Q components are generated at a first sampling frequency based on the input signal, and are then up-sampled in accordance with a predetermined first interpolation factor (N), to generate up-sampled I and Q components at a second sampling frequency higher than the first sampling frequency. The up-sampled I and Q components are converted into the phase and amplitude components, wherein the converting step is operated at the second sampling frequency. Moreover, the phase and amplitude components can be further up-sampled, optionally by different sampling frequencies, to a third and a fourth sampling frequency. Thereby, I-Q generation and cartesian-to -polar transformation can be performed at lower frequencies, which reduces power consumption.

公开(公告)号：WO2009115989A3

公开(公告)日：2010-06-17

申请号：PCT/IB2009051131

申请日：2009-03-17

Applicant: NXP BV ,  DE JONG GERBEN W ,  COLLADOS ASENSIO MANEL

Inventor： DE JONG GERBEN W ,  COLLADOS ASENSIO MANEL

IPC: H03D7/14 ,  H03D7/16

CPC classification number: H03D7/166 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1466 ,  H03D7/1483 ,  H03D2200/0084

Abstract: The present application relates to an apparatus comprising a low-noise mixing unit, and more particularly to a receiver comprising the apparatus. The apparatus comprises a mixing unit configured to frequency down convert an input signal. The mixing unit comprises a number of switching units. The apparatus encompasses a generating unit configured to generate at least one local oscillator signal. The generating unit is configured to drive the number of switching units such that a maximum of one of the switching units is conductive at a certain time.

Abstract translation: 本申请涉及一种包括低噪声混合单元的装置，更具体地涉及包括该装置的接收机。 该装置包括被配置为降频转换输入信号的混合单元。 混合单元包括多个开关单元。 该装置包括被配置为产生至少一个本地振荡器信号的生成单元。 生成单元被配置为驱动开关单元的数量，使得最多一个开关单元在一定时间导通。

公开(公告)号：WO2009022254A1

公开(公告)日：2009-02-19

申请号：PCT/IB2008/053106

申请日：2008-08-04

Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V. ,  VAN ZEIJL, Paulus, T., M. ,  DUPERRAY, David, B., D. ,  COLLADOS ASENSIO, Manel

Inventor： VAN ZEIJL, Paulus, T., M. ,  DUPERRAY, David, B., D. ,  COLLADOS ASENSIO, Manel

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H04B1/0483

Abstract: The present invention relates to a transmission apparatus having at least two transmission branches for transmitting respective transmission signals at substantially same frequencies, and to a method of controlling such a transmission apparatus. A first oscillator circuit (62) is provided for generating a first signal at a first frequency to be used in a first transmission branch. Additionally, a second oscillator circuit (64) is provided for generating a second signal at a second frequency to be used in a second transmission branch, the second frequency being different from the first frequency. To enable transmission of the transmission signals at said substantially same frequencies, at least one frequency divider or multiplier (72, 74) is provided for dividing or respectively multiplying at least one of said first and second frequencies by a respective predetermined factor. Thereby, the first and second oscillator circuits can be operated at different frequencies, so that mutual coupling can be reduced.

Abstract translation: 本发明涉及具有至少两个用于以基本上相同的频率发送各个发送信号的发送分支的发送装置，以及一种控制这种发送装置的方法。 提供第一振荡器电路（62），用于产生要在第一传输分支中使用的第一频率的第一信号。 此外，提供第二振荡器电路（64），用于产生要在第二传输分支中使用的第二频率的第二信号，第二频率与第一频率不同。 为了能够以所述基本相同的频率传输传输信号，提供了至少一个分频器或乘法器（72,74），用于将所述第一和第二频率中的至少一个频率分频或分别乘以相应的预定因子。 因此，第一和第二振荡器电路可以以不同的频率工作，从而可以减少互耦。

公开(公告)号：WO2007122562A2

公开(公告)日：2007-11-01

申请号：PCT/IB2007051411

申请日：2007-04-19

Applicant: KONINKL PHILIPS ELECTRONICS NV ,  VAN ZEIJL PAULUS T M ,  COLLADOS ASENSIO MANEL

Inventor： VAN ZEIJL PAULUS T M ,  COLLADOS ASENSIO MANEL

IPC: H03C1/36

CPC classification number: H03C1/36 ,  H03C5/00

Abstract: Modulators (1) for amplitude-modulating signals defined by phase information and envelope codes are provided with first transistors (11) for receiving the phase information and second transistors (12) for receiving the envelope codes. The first main electrode of one transistor (11,12) is coupled to the second main electrode of the other transistor (11,12) and the other second main electrode constitutes an output (51) of the modulator (1). This modulator (1) can be used in any kind of transistor environment and is simple and low cost. The doped areas (84,94) of the coupled first and second main electrodes comprise an overlap to reduce cross-talk and to reduce silicon area. Polar transmitters (2) are provided with this modulator (1) and with a circuit (3) for generating a phase/frequency code and the envelope code and with an oscillator (6) for receiving the phase/frequency code and for generating the phase information. Means for creating a phase shift between the phase information and the envelope code reduce aliases.

Abstract translation: 用于由相位信息和包络码定义的幅度调制信号的调制器（1）设置有用于接收相位信息的第一晶体管（11）和用于接收包络码的第二晶体管（12）。 一个晶体管（11,12）的第一主电极耦合到另一个晶体管（11,12）的第二主电极，另一个第二主电极构成调制器（1）的输出端（51）。 该调制器（1）可用于任何种类的晶体管环境，成本低廉。 耦合的第一和第二主电极的掺杂区域（84,94）包括重叠以减少串扰并减少硅面积。 极性发射器（2）设置有该调制器（1）和用于产生相位/频率代码的电路（3）和包络码以及用于接收相位/频率码并用于产生相位的振荡器（6） 信息。 在相位信息和包络码之间产生相移的手段减少了别名。

公开(公告)号：WO2010000746A1

公开(公告)日：2010-01-07

申请号：PCT/EP2009/058201

申请日：2009-06-30

Applicant: NXP B.V. ,  PAVLOVIC, Nenad ,  COLLADOS ASENSIO, Manel ,  HE, Xin ,  VAN SINDEREN, Jan

Inventor： PAVLOVIC, Nenad ,  COLLADOS ASENSIO, Manel ,  HE, Xin ,  VAN SINDEREN, Jan

IPC: H03D13/00 ,  H03L7/091

CPC classification number: H03L7/085 ,  H03L7/091

Abstract: Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit (20) of a time to digital converter between a normal operating mode or a calibration mode. A delay circuit (22) with a delay circuit input and a plurality of taps outputs respective, differently delayed versions of a signal from a delay circuit input. A sampling register (24) has data inputs coupled to the taps, and samples data from the data inputs in response to an active transition at a clock input. When in the normal operating mode, the feed circuit (2) feeds an oscillator signal of an oscillator circuit (10) to the delay circuit input and a reference signal to the clock input of the sampling register (24). When in the calibration mode, the feed circuit (20) supplies signals with transitions having timing controlled by the oscillator signal to both the delay circuit input and the clock input. The feed circuit (20) provides for selection of transitions of the oscillator signal that control timing of a first active transition at the clock circuit after a transition at the delay circuit input. A control circuit (28) switches the feed circuit between the normal operating mode and the calibration mode, and controls the feed circuit (20) successively to select a plurality of different transitions to control timing of the first active transition in the calibration mode. The control circuit reads out resulting data from the sampling register (24) for each selection and determine calibration data for the oscillator signal from said data.

Abstract translation: 通过在正常操作模式或校准模式之间切换时间到数字转换器的馈电电路（20）来获得校准数字转换时间的校准数据。 具有延迟电路输入和多个抽头的延迟电路（22）输出来自延迟电路输入的信号的相应不同延迟的版本。 采样寄存器（24）具有耦合到抽头的数据输入，并响应于在时钟输入处的有源转换从数据输入端采样数据。 当处于正常工作模式时，馈电电路（2）将振荡器电路（10）的振荡器信号馈送到延迟电路输入端，并将参考信号馈送到采样寄存器（24）的时钟输入端。 当处于校准模式时，馈电电路（20）将具有由振荡器信号控制的定时的转换信号提供给延迟电路输入和时钟输入。 馈电电路（20）提供选择振荡器信号的转换，该振荡器信号在延迟电路输入的转变之后控制时钟电路处的第一有源跃迁的定时。 控制电路（28）在正常操作模式和校准模式之间切换供电电路，并且连续地控制馈电电路（20）以选择多个不同的转变以控制校准模式中的第一主动转换的定时。 控制电路从每个选择的采样寄存器（24）中读出结果数据，并根据所述数据确定振荡器信号的校准数据。

公开(公告)号：WO2004110086A1

公开(公告)日：2004-12-16

申请号：PCT/IB2004/050776

申请日：2004-05-26

Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V. ,  COLLADOS ASENSIO, Manel ,  DE JONG, Gerben, W.

Inventor： COLLADOS ASENSIO, Manel ,  DE JONG, Gerben, W.

IPC: H04Q7/30

CPC classification number: H04B1/006 ,  H04B1/005 ,  H04B1/406

Abstract: A receiver (10) is arranged to simultaneously receive at least a first (S1) radio frequency signal having a first frequency band (1) and a second radio frequency signal (S3) having a second frequency band (3) that is at least partly overlapping the first frequency band (1). The receiver has frequency down-conversion means (32,33) for frequency down­ converting the at least first (S1) and second radio frequency signals (S3) to at least a first (S2) and a second (S4) lower frequency signal and multiplexing means (34) for sequentially multiplexing the at least first (S2) and second lower frequency signals (S4) into a frequency multiplexed signal (S5).

Abstract translation: 接收机（10）被布置成同时接收具有第一频带（1）的第一（S1）射频信号和具有至少部分地具有第二频带（3）的第二射频信号（S3） 与第一频带（1）重叠。 接收机具有频率下变频装置（32,33），用于将至少第一（S1）和第二射频信号（S3）降频转换成至少第一（S2）和第二（S4）较低频率信号，以及 用于将所述至少第一（S2）和第二低频信号（S4）顺序复用为频率复用信号（S5）的多路复用装置（34）。

公开(公告)号：WO2004049593A1

公开(公告)日：2004-06-10

申请号：PCT/IB2003/004876

申请日：2003-10-29

Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V. ,  VANDEWIELE, Bertrand, J., L. ,  MATTHEIJSSEN, Paul ,  COLLADOS ASENSIO, Manel

Inventor： VANDEWIELE, Bertrand, J., L. ,  MATTHEIJSSEN, Paul ,  COLLADOS ASENSIO, Manel

IPC: H04B7/08

CPC classification number: H04L1/06 ,  H04B1/7117 ,  H04B7/082 ,  H04B7/0854

Abstract: An apparatus that comprises means to simultaneously receive a first number of signals and a larger number of signal pathways comprises means to determine the correlation between first said number of signals for each of the possible signal pathways. The apparatus also comprises means to select from said second number of possible signal pathways an optimal subset of signal pathways that assure that there is a minimum level of correlation between said received first number of signals.

Abstract translation: 包括同时接收第一数量信号和更多数量的信号路径的装置的装置包括确定每个可能信号路径的第一所述信号数之间的相关性的装置。 该装置还包括用于从所述第二数量的可能的信号路径中选择信号通路的最佳子集，以确保在所述接收的第一数量信号之间存在最小相关度的装置。

公开(公告)号：WO2010003864A2

公开(公告)日：2010-01-14

申请号：PCT/EP2009058282

申请日：2009-07-01

Applicant: NXP BV ,  COLLADOS ASENSIO MANEL ,  HE XIN ,  PAVLOVIC NENAD ,  SINDEREN JAN VAN

Inventor： COLLADOS ASENSIO MANEL ,  HE XIN ,  PAVLOVIC NENAD

IPC: H03C5/00

CPC classification number: H03C5/00

Abstract: The present application relates to a digital modulator comprising an output stage comprising a number of unit cell arrays, and a sampling stage. The present application relates also to a communication device comprising said digital modulator, a method for digitally modulating and a computer program product. More particularly, the digital modulator comprises an output stage comprising a number of unit cell arrays, wherein the output stage comprises at least one carrier frequency signal input terminal configured to receive a carrier frequency signal. The digital modulator comprises a sampling stage connectable to the output stage, wherein the sampling stage is configured to oversample at least one data input signal. The digital modulator comprises at least one sampling clock generating device configured to generate at least one sampling clock signal depending on the number of arranged unit cell arrays and the carrier frequency signal.

Abstract translation: 本申请涉及一种数字调制器，其包括包括多个单元阵列的输出级和采样级。 本申请还涉及包括所述数字调制器，数字调制方法和计算机程序产品的通信设备。 更具体地，数字调制器包括包括多个单元阵列的输出级，其中输出级包括被配置为接收载波频率信号的至少一个载波频率信号输入端。 数字调制器包括可连接到输出级的采样级，其中采样级被配置为对至少一个数据输入信号进行过采样。 数字调制器包括至少一个采样时钟产生装置，其被配置为根据排列的单元阵列的数量和载波频率信号产生至少一个采样时钟信号。