Abstract:
A system includes fobs and sensors each of which has a wireless transceiver, a processor and a battery powering the transceiver and processor. A server includes a processor and wireless transceiver, both of which are mains-powered. A fob processor timer repetitively causes its processor to enter a normal mode from sleep mode, cause the transceiver to enter a powered state from a reduced power state, and send a wireless message from its transceiver to the server transceiver to request data therefrom. A sensor processor timer repititvely causes its processor to enter a normal mode from a sleep mode, cause the transceiver to enter a powered state from a reduced power state, read an analog or digital input, and send a wireless message based upon the read input from its transceiver to the server transceiver to provide data thereto. Each of the timers times asynchronously with respect to other timers.
Abstract:
Methods, apparatuses, systems, and implementations of an HMI control system for BOP rigs are disclosed. At least some versions of the disclosed systems enable a user to configure interface settings, perform actions on a BOP stack, view diagnostics, perform testing, and observe and rectify alarms. The disclosed systems may enable a user to more efficiently navigate between different interfaces and perform HMI functions due to a control zone configuration. Additionally, the control zone configuration may reduce operator error by assigning certain control zones to particular functions and requiring the user to take affirmative steps to perform destructive functions.
Abstract:
A wireless node comprising : a processor having a normal mode of operation, a sleep mode of operation, a wake up routine and an analog or gigital input; a wireless transceiver having a powered state of operation and a reduced power state of operation; and a battery structured to power the processor and the wireless transceiver. The processor is further structured to cause the wireless transceiver to enter the reduced power state of operation from the powe'red state of operation before the processor enters the sleep mode of operation from the normal mode of operation, and to cause the wireless tarisceiver to enter the powered state of operation from the reduced power state of operation after the processor enters the normal mode of operation from the sleep mode of operation. The wake up routine is structured to remove the processor from the sleep mode of operation, independent of the wireless transceiver.