Abstract:
A non-volatile memory has a first payload data region and a first redundant memory area associated with the first payload data region. The first redundant memory area has a first portion, a second portion and a third portion. The first portion includes first payload error correction code (ECC) data associated with the first payload data region. The second portion includes first metadata associated with the first payload data region. The third portion includes first metadata ECC data associated with the first metadata.
Abstract:
A non-volatile memory has a first payload data region and a first redundant memory area associated with the first payload data region. The first redundant memory area has a first portion, a second portion and a third portion. The first portion includes first payload error correction code (ECC) data associated with the first payload data region. The second portion includes first metadata associated with the first payload data region. The third portion includes first metadata ECC data associated with the first metadata.
Abstract:
The disclosure includes a system (100) and method of using a processor and protected memory. In a particular embodiment, the system includes a processor, a volatile memory (104) accessible to the processor, and a first nonvolatile memory (106) accessible to the processor. The first nonvolatile memory includes a first portion of memory that is protected and is readable when a shied bit indicates an unshielded mode of operation, but is unreadable when the shield bit indicates a shielded mode of operation and a second portion of memory that is unprotected and that is readable regardless of the value of the shield bit (124). The system includes a second nonvolatile memory (108) including data to be transferred to the volatile memory.
Abstract:
A system and method for detecting a mode of an audio signal is disclosed. The system includes an integrated circuit with an input to receive a signal and an audio processor coupled to the input. The audio processor includes an audio standard detection module, wherein the audio standard detection module detects a characteristic of the received signal that identifies a television audio standard by measuring the energy level of a plurality of different frequency bands of the received signal.
Abstract:
A system and method for providing direct memory access is disclosed. In a particular embodiment, a direct memory access module is disclosed that includes a memory, a first interface coupled to a processor, and a second interface coupled to a peripheral module. A first instruction received from the first interface is stored in the memory. The first instruction includes a number of programmed input/output words to be provided to the peripheral module via the second interface. The direct memory access module also includes an instruction execution unit to process the first instruction.
Abstract:
A radio receiver, optionally used in conjunction with a handheld audio system, includes a radio stage for processing a received radio signal into an audio signal. An audio stage produces an audio output, based on the audio signal. An overload monitor detects an overload condition in the radio stage and generates an overload signal in response to the detected overload condition. A controller controls the audio output in response to the overload signal.
Abstract:
A method of controlling a clock frequency is disclosed and includes monitoring a plurality of master devices that are coupled to a bus within a system. The method also includes receiving an input from at least one of the plurality of master devices. The input can be a request an increase to the clock frequency of the bus. Further, the method includes selectively increasing the clock frequency of the bus in response to the request.
Abstract:
A digital clock generator includes a base clock generator for generating a base clock signal at a variable base clock frequency in response to a control signal. A digital clock controller generates a digital clock signal having a substantially constant number of digital clock cycles over a predetermined period.
Abstract:
A system and method for decoding a received television signal is disclosed. The system includes an input to receive a digital audio signal and a digital variable deemphasis module to modify the amplitude of the digital audio signal based on a plurality of variable coefficients. The system also includes an exponential digital root mean square (ERMS) detector to provide level detection of the digital audio signal. The plurality of variable coefficients of the digital variable deemphasis module are digitally computed based on an output of the digital ERMS detector.
Abstract:
A method of controlling a clock frequency is disclosed and includes monitoring a plurality of master devices that are coupled to a bus within a system. The method also includes receiving an input from at least one of the plurality of master devices. The input can be a request an increase to the clock frequency of the bus. Further, the method includes selectively increasing the clock frequency of the bus in response to the request.