Abstract:
A computer able to execute programs coded in either of two binary instruction sets. Memory is divided into regions, and each region is marked to indicate which of the two instruction sets are to be used to execute instructions fetched from that region. The native operating system manages contexts so that the operating system for the guest instruction set architecture can context switch, even if the process being context-switched out is a process in the native instruction set. Code in the guest instruction set is profiled to determine which portions are most profitably translated into the native instruction set. Circuitry recognizes when execution of a binary in the guest instruction set has reached a flow point for which a translated native equivalent exists. Concurrency controls protect the translated native code against modification by self-modifying code or DMA writes.
Abstract:
A computer able to execute programs coded in either of two binary instruction sets. Memory is divided into regions, and each region is marked to indicate which of the two instruction sets are to be used to execute instructions fetched from that region. The native operating system manages contexts so that the operating system for the guest instruction set architecture can context switch, even if the process being context-switched out is a process in the native instruction set. Code in the guest instruction set is profiled to determine which portions are most profitably translated into the native instruction set. Circuitry recognizes when execution of a binary in the guest instruction set has reached a flow point for which a translated native equivalent exists. Concurrency controls protect the translated native code against modification by self-modifying code or DMA writes.