Abstract:
A multi-level framework (5) that allows an application (10) to be developed independent of the chip or board, and any dependency is built in as part of the framework (5) of the field programmable device (FPD). A shell configuration called a 'wrapper' (15) has a standard look, feel and form factor that provides the interface between the high density language (HDL) application (10) and a standardized and board independent HDL shell (15), thus isolating the HDL core (10). A second wrapper is a board specific HDL shell (20) that interacts with the standardized shell (15). Any application that has the same look, feel and form factor has a common interface that allows various system boards to communicate, providing a mechanism for creating a HDL application component independent of the hardware. An outer shell (20) binds the system to some board and talks to the application program interface (API) layer (25) and the code layer (30) to the outside world, such as the operating system.
Abstract:
The feed for the subject receiver-on-chip is a 30 Mhz to 18 Mhz Rf input (42), which is coupled to an RF pre-select and attenuation or notch filter circuit (44), which is off-chip. The out put of this circuit is amplified by a low noise amplifier LNA (46) and is either switched between a low band pass filter (48) or mixer (50) is used in a single down conversion stage, with the mixer (50) being driven by either 8, 10 or 12 GHz local oscillators on line (52) from a clock and local oscillator (54).
Abstract:
A multi-level framework (5) that allows an application (10) to be developed independent of the chip or board, and any dependency is built in as part of the framework (5) of the field programmable device (FPD). A shell configuration called a 'wrapper' (15) has a standard look, feel and form factor that provides the interface between the high density language (HDL) application (10) and a standardized and board independent HDL shell (15), thus isolating the HDL core (10). A second wrapper is a board specific HDL shell (20) that interacts with the standardized shell (15). Any application that has the same look, feel and form factor has a common interface that allows various system boards to communicate, providing a mechanism for creating a HDL application component independent of the hardware. An outer shell (20) binds the system to some board and talks to the application program interface (API) layer (25) and the code layer (30) to the outside world, such as the operating system.
Abstract:
A layered mechanism (Fig. 1) for integrating programmable devices into software based frameworks for distributed processing wherein the software framework (16) interfaces with an adaptation layer (10), which in turn interfaces with a programmable device (12), such as a field programmable gate array (FPGA). The adaptation layer (10) specifies and enforces compatible electrical, physical and logical interfaces between the programmable device (12) and the software-based framework (16) of which the device (12), the application running on it, and the adaptation layer (10) form a component.
Abstract:
A multi-level framework that allows an application to be developed independent of the chip or board, and any dependency is built in as part of the framework of the field programmable device (FPD). A shell configuration called a 'wrapper' has a standard look, feel and form factor that provides the interface between the high density language (HDL) application and a standardized and board independent HDL shell, thus isolating the HDL core. A second wrapper is a board specific HDL shell that interacts with the standardized shell. Any application that has the same look, feel and form factor has a common interface that allows various system boards to communicate, providing a mechanism for creating a HDL application component independent of the hardware. An outer shell binds the system to some board and talks to the application program interface (API) layer and the code layer to the outside world, such as the operating system.
Abstract:
A layered mechanism for integrating programmable devices into software based frameworks for distributed processing wherein the software framework interfaces with an adaptation layer, which in turn interfaces with a programmable device, such as a field programmable gate array (FPGA). The adaptation layer specifies and enforces compatible electrical, physical and logical interfaces between the programmable device and the software-based framework of which the device, the application running on it, and the adaptation layer form a component.
Abstract:
What is provided is a receiver-on-a-chip comprising a monolithic integrated circuit that reduces the receiver to a cigarette-pack-sized assembly mountable directly at an antenna element, with a much-increased operational bandwidth and instantaneous bandwidth, increased dynamic range and with a two-order-of-magnitude decrease in size and weight. Moreover, because of the elimination of all of the I/O drivers and attendant circuitry, power consumption is reduced by two-thirds, whereas the mean time before failure is increased to 10,000 hours due to the robustness of the monolithic integrated circuit and use of fiber optics.
Abstract:
A layered mechanism (Fig. 1) for integrating programmable devices into software based frameworks for distributed processing wherein the software framework (16) interfaces with an adaptation layer (10), which in turn interfaces with a programmable device (12), such as a field programmable gate array (FPGA). The adaptation layer (10) specifies and enforces compatible electrical, physical and logical interfaces between the programmable device (12) and the software-based framework (16) of which the device (12), the application running on it, and the adaptation layer (10) form a component.