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    METHOD AND APPARATUS FOR IMPROVING DATA AND COMPUTATIONAL THROUGHPUT OF A CONFIGURABLE PROCESSOR EXTENSION
    2.
    发明申请
    METHOD AND APPARATUS FOR IMPROVING DATA AND COMPUTATIONAL THROUGHPUT OF A CONFIGURABLE PROCESSOR EXTENSION 审中-公开
    用于改进可配置处理器扩展的数据和计算通路的方法和装置

    公开(公告)号：WO2007112031A2

    公开(公告)日：2007-10-04

    申请号：PCT/US2007/007310

    申请日：2007-03-23

    Applicant: ARC INTERNATIONAL ,  ARISTODEMOU, Aris ,  COHEN, Amnon, Baron ,  WONG, Kar-Lik ,  LIM, Ryan, S.C. ,  JONES, Simon

    Inventor： ARISTODEMOU, Aris ,  COHEN, Amnon, Baron ,  WONG, Kar-Lik ,  LIM, Ryan, S.C. ,  JONES, Simon

    IPC: G06F15/00

    CPC classification number: G06F13/28

    Abstract: Methods and apparatus adapted for enhancing the throughput of a digital processor (e.g., microprocessor, CISC device, or RISC device) through use of a direct memory access (DMA) mechanism. In one embodiment, the processor comprises a "soft" RISC-based processor core that is both user-extensible and user-configurable. The core comprises a functional process or unit (DMA assist) that is coupled to the processor's extension logic and which facilitates throughput by, among other things, ensuring that the CPU and processor extension logic can operate on data in parallel in an efficient manner. In one variant, a parallel datapath (including a buffer) is used in conjunction with the aforementioned DMA assist so as to permit the processor extension logic to efficiently operate in parallel with the CPU.

    Abstract translation: 适用于通过使用直接存储器访问（DMA）机制来增强数字处理器（例如，微处理器，CISC设备或RISC设备）的吞吐量的方法和装置。 在一个实施例中，处理器包括用户可扩展和用户可配置的“软”基于RISC的处理器核心。 核心包括耦合到处理器的扩展逻辑的功能过程或单元（DMA辅助），并且其通过确保CPU和处理器扩展逻辑能够以有效的方式并行地对数据进行操作来促进吞吐量。 在一个变型中，并行数据路径（包括缓冲器）与上述DMA辅助结合使用，以便允许处理器扩展逻辑与CPU并行地高效地操作。

    ADAPTIVE VIDEO ENCODING APPARATUS AND METHODS
    4.
    发明申请
    ADAPTIVE VIDEO ENCODING APPARATUS AND METHODS 审中-公开
    自适应视频编码设备和方法

    公开(公告)号：WO2008147565A3

    公开(公告)日：2009-01-22

    申请号：PCT/US2008006705

    申请日：2008-05-27

    Applicant: ARC INTERNATIONAL PLC ,  GRAHAM CARL NORMAN ,  LIM SEOW CHUAN ,  ARISTODEMOU ARIS ,  MASON JOHN R M ,  HALL TIM ,  NEMOUCHI YAZID ,  WONG KAR-LIK ,  PENNELLO THOMAS J

    Inventor： GRAHAM CARL NORMAN ,  LIM SEOW CHUAN ,  ARISTODEMOU ARIS ,  MASON JOHN R M ,  HALL TIM ,  NEMOUCHI YAZID ,  WONG KAR-LIK ,  PENNELLO THOMAS J

    IPC: H04N7/26

    CPC classification number: H04N7/26244 ,  H04N19/103 ,  H04N19/12 ,  H04N19/156 ,  H04N19/172 ,  H04N19/176 ,  H04N19/189 ,  H04N21/2662

    Abstract: A real-time video encoder is disclosed that changes video encoding processes to produce the best quality encoded video whilst maintaining a target encoding frame rate, according to one or more operating constraints. The systems and methods described here overcome the inflexibility of existing video encoders by providing best encoded picture quality during any system resource or picture characteristic variations. This is achieved by checking encoding progress regularly throughout an encode sequence, including checking encoding progress within a macroblock or intra -macroblock, and automatically adapting the encoder's use of encoding tools according to actual achieved encoding progress. No specific knowledge of, or measurement of, changes in system resources or picture characteristics is required.

    Abstract translation: 公开了一种实时视频编码器，其根据一个或多个操作约束来改变视频编码处理以产生最佳质量的编码视频，同时维持目标编码帧速率。 这里描述的系统和方法通过在任何系统资源或图像特征变化期间提供最佳编码图像质量来克服现有视频编码器的不灵活性。 这是通过在整个编码序列中定期检查编码进程来实现的，包括检查宏块内或宏块内的编码进程，以及根据实际实现的编码进程自动调整编码器对编码工具的使用。 不需要具体的知识或测量系统资源或图片特征的变化。

    METHOD AND APPARATUS FOR IMPROVING DATA AND COMPUTATIONAL THROUGHPUT OF A CONFIGURABLE PROCESSOR EXTENSION
    6.
    发明申请
    METHOD AND APPARATUS FOR IMPROVING DATA AND COMPUTATIONAL THROUGHPUT OF A CONFIGURABLE PROCESSOR EXTENSION 审中-公开
    用于改进可配置处理器扩展的数据和计算通路的方法和装置

    公开(公告)号：WO2007112031A3

    公开(公告)日：2008-10-02

    申请号：PCT/US2007007310

    申请日：2007-03-23

    Applicant: ARC INT ,  ARISTODEMOU ARIS ,  COHEN AMNON BARON ,  WONG KAR-LIK ,  LIM RYAN S C ,  JONES SIMON

    Inventor： ARISTODEMOU ARIS ,  COHEN AMNON BARON ,  WONG KAR-LIK ,  LIM RYAN S C ,  JONES SIMON

    IPC: G06F9/00

    CPC classification number: G06F13/28

    Abstract: Methods and apparatus adapted for enhancing the throughput of a digital processor (e.g., microprocessor, CISC device, or RISC device) through use of a direct memory access (DMA) mechanism. In one embodiment, the processor comprises a "soft" RISC-based processor core that is both user-extensible and user-configurable. The core comprises a functional process or unit (DMA assist) that is coupled to the processor's extension logic and which facilitates throughput by, among other things, ensuring that the CPU and processor extension logic can operate on data in parallel in an efficient manner. In one variant, a parallel datapath (including a buffer) is used in conjunction with the aforementioned DMA assist so as to permit the processor extension logic to efficiently operate in parallel with the CPU.

    Abstract translation: 适用于通过使用直接存储器访问（DMA）机制来增强数字处理器（例如，微处理器，CISC设备或RISC设备）的吞吐量的方法和装置。 在一个实施例中，处理器包括用户可扩展和用户可配置的“软”基于RISC的处理器核心。 核心包括耦合到处理器的扩展逻辑的功能过程或单元（DMA辅助），并且通过确保CPU和处理器扩展逻辑能够以有效的方式并行地对数据进行操作来促进吞吐量。 在一个变型中，并行数据路径（包括缓冲器）与上述DMA辅助结合使用，以便允许处理器扩展逻辑与CPU并行地高效地操作。

    INTER-PROCESSOR COMMUNICATION METHOD
    7.
    发明申请
    INTER-PROCESSOR COMMUNICATION METHOD 审中-公开
    交互处理器通信方法

    公开(公告)号：WO2008045341A1

    公开(公告)日：2008-04-17

    申请号：PCT/US2007/021427

    申请日：2007-10-05

    Applicant: ARC INTERNATIONAL ,  JONES, Simon ,  GRAHAM, Carl, Norman ,  WONG, Kar-Lik

    Inventor： JONES, Simon ,  GRAHAM, Carl, Norman ,  WONG, Kar-Lik

    IPC: G06F15/16 ,  G06F15/17 ,  G06F9/30

    CPC classification number: G06F9/3879 ,  G06F9/30003 ,  G06F9/30145 ,  G06F15/8015

    Abstract: Inter-processor communication systems and methods that define within the instruction set of the microprocessor a command for directing the microprocessor to relinquish control over at least one of the microprocessor's internal registers. The microprocessor may then signal a communication interface that collects data from external sources. The communication interface takes control over the internal register released by the microprocessor and inputs the collected external data directly into the internal register of the microprocessor. Once data is place into the internal register, control of that register may be returned to the microprocessor.

    Abstract translation: 处理器间通信系统和方法，其在微处理器的指令集内定义用于指示微处理器放弃对微处理器的内部寄存器中的至少一个的控制的命令。 然后，微处理器可以向从外部源收集数据的通信接口发出信号。 通信接口控制由微处理器释放的内部寄存器，并将收集的外部数据直接输入微处理器的内部寄存器。 一旦将数据放入内部寄存器，该寄存器的控制可能会返回到微处理器。

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