公开(公告)号：WO2003023858A1

公开(公告)日：2003-03-20

申请号：PCT/JP2002/009032

申请日：2002-09-05

Applicant: セイコーエプソン株式会社 ,  名取 栄治 ,  木島 健

Inventor： 名取 栄治 ,  木島 健

IPC: H01L27/105

CPC classification number: H01L27/11502 ,  H01L27/11507 ,  H01L28/55

Abstract: A ferroelectric memory device comprises a first electrode 102, second electrodes 103 arrayed in a direction perpendicular to the first electrode 102, and a ferroelectric film 101 disposed at least in an intersection area of the first electrode 102 and the second electrodes 103. Capacitors constituted of the first electrode 102, the ferroelectric film 101, and the second electrodes 103 are arranged in a matrix. In the ferroelectric film 101, a ferroelectric phase and a paraelectric phase are mixedly present.

Abstract translation: 铁电存储器件包括第一电极102，沿垂直于第一电极102的方向排列的第二电极103和至少设置在第一电极102和第二电极103的交叉区域中的铁电膜101.电容器由 第一电极102，铁电体膜101和第二电极103以矩阵形式布置。 在铁电体膜101中，混合存在铁电相和顺电相。