公开(公告)号：WO2020041276A1

公开(公告)日：2020-02-27

申请号：PCT/US2019/047217

申请日：2019-08-20

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： KOCEV, Andrej ,  FLEISCHMAN, Jay ,  TROESTER, Kai ,  CHU, Johnny C. ,  WILKENS, Tim J. ,  MARKETKAR, Neil ,  LONG, Michael W.

IPC: G06F9/38 ,  G06F9/30 ,  G06F9/32

Abstract: Systems and methods selectively bypass address-generation hardware in processor instruction pipelines. In an embodiment, a processor includes an address-generation stage and an address-generation-bypass-determination unit (ABDU). The ABDU receives a load/store instruction. If an effective address for the load/store instruction is not known at the ABDU, the ABDU routes the load/store instruction via the address-generation stage of the processor. If, however, the effective address of the load/store instruction is known at the ABDU, the ABDU routes the load/store instruction to bypass the address-generation stage of the processor.