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公开(公告)号:WO2021126800A1
公开(公告)日:2021-06-24
申请号:PCT/US2020/065011
申请日:2020-12-15
Applicant: ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC
Inventor: SHENOY, Sukesh , CLARK, Adam N.C. , JAGGERS, Christopher M.
IPC: G06F1/20 , G06F1/32 , G06F1/16 , G06F9/50 , G05D23/19 , G01K13/00 , G06F1/206 , G06F1/3203 , G06F1/3206 , G06F1/3287
Abstract: A processing unit [110] manages temperature by correlating readings from a plurality of external temperature sensors [106, 107] to a skin temperature of the processing unit, wherein the correlation is based on characteristics of a computer chassis [223] that is to include the processing unit. The processing unit is mounted on a printed circuit board (PCB) [102] or other substrate that is to be placed in a computer chassis. Each of a plurality of temperature sensors is placed at a different location of the PCB to provide temperature readings from a variety of locations of the PCB. A temperature controller [115] of the processing unit receives temperature readings from the plurality of sensors and correlates the temperature readings with a skin temperature of the processing unit based on a plurality of correlation values [118].
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公开(公告)号:WO2023278007A1
公开(公告)日:2023-01-05
申请号:PCT/US2022/027037
申请日:2022-04-29
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor: JAGGERS, Christopher M.
IPC: H01L23/36
Abstract: An apparatus for a common cooling solution for multiple packages of a common height, including: a first die package; a second die package having a same height as the first die package; and a cooling element thermally coupled to the first die package and the second die package by a planar surface of the cooling element.
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公开(公告)号:WO2022212603A1
公开(公告)日:2022-10-06
申请号:PCT/US2022/022685
申请日:2022-03-30
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor: RADKE, Robert E. , JAGGERS, Christopher M.
IPC: G06F13/38 , H04Q11/00 , G06F13/385 , G06F13/4027 , H04B10/801
Abstract: A system and method for efficient data transfer in a computing system are described. A computing system includes multiple nodes that receive tasks to process. A bridge interconnect transfers data between two processing nodes without the aid of a system bus on the motherboard. One of the multiple bridge interconnects of the computing system is an optical bridge interconnect that transmits optical information across the optical bridge interconnect between two nodes. The receiving node uses photonic integrated circuits to translate the optical information into electrical information for processing by electrical integrated circuits. One or more nodes switch between using an optical bridge interconnect and a non-optical bridge interconnect based on one or more factors such as measured power consumption and measured data transmission error rates.
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