公开(公告)号：WO2005067609A2

公开(公告)日：2005-07-28

申请号：PCT/US2005/000333

申请日：2005-01-07

Applicant: ALTEC LANSING TECHNOLOGIES, INC.

Inventor： ZEPP, David

IPC: H03F1/30 ,  H03F1/32 ,  H03F3/217 ,  H03G7/00

CPC classification number: H03F3/217 ,  H03F1/30 ,  H03F1/32 ,  H03F3/2173 ,  H03F2200/351 ,  H03F2200/471 ,  H03F2200/78 ,  H03G7/00

Abstract: A circuit according to the present invention improves the power supply rejection ratio for a pulse width modulated digital amplifier and can be used as a compressor and/or limiter. The circuit preferably operates by using voltage level translation to vary the amplitude of a triangle wave in response to changes in power supply voltage prior to input of the wave into a comparator of the PWM device. Because the circuit operates to improve power supply rejection, little or no distortion is introduced into the signal when used as a compressor and/or limiter. Additionally, the circuit is optionally implemented in a Class D amplifier, and provides a lower cost of implementation than conventional designs in such implementations.

Abstract translation: 根据本发明的电路提高了脉宽调制数字放大器的电源抑制比，并且可以用作压缩器和/或限制器。 该电路优选地通过使用电压电平转换来操作，以响应于在将PWM输入到PWM器件的比较器之前的电源电压的变化来改变三角波的幅度。 由于该电路用于改善电源抑制，当用作压缩器和/或限制器时，很少或没有引入失真信号。 此外，电路可选地在D类放大器中实现，并且在这种实现中提供比常规设计更低的实现成本。