Abstract:
An amplifier arrangement comprises an input transistor (MIN) being connected between reference potential terminals (VDD, VSS) by means of a current source (IB1) and a current sink (IS). An amplifier stage has an amplifier output (OUT) coupled to a first connection node (INSRC) between the current sink (IS) and a first terminal of the input transistor (MIN) by means of a feedback path (FB), and an amplifier input connected to a second connection node (INDR) between the current source (ID1) and the second terminal of the input transistor (MIN). A level-shifting structure (LSC) comprises a level-shifting element (VS) with one end connected to a reference connection, wherein the level-shifting element (VS) is adapted to perform a level-shifting of a potential at the second connection node (INDR) with respect to a potential at the reference connection. The reference connection is coupled to one of the following: the amplifier output (OUT), the first connection node (INSRC), a control terminal of the input transistor (MIN).
Abstract:
Systems and techniques are disclosed for configuring a circuit containing a two-stage amplifier including a first stage containing at least a differential amplifier, a second stage containing at least a transistor, and a sensing circuit configured to provide a gate voltage to a compensation component. The compensation component may be configured to connect the first stage and the second stage and to generate a lead-lag compensation. The compensation component may contain a compensation capacitor and a variable compensation resistive component in series connection with the compensation capacitor.
Abstract:
An amplifier for modulating the amplitude of an RF signal, the amplifier comprising a plurality of amplifier circuits, each circuit being connected to a first power source, each circuit having a charge storage device and an output across which a potential difference supplied by the first power source can be applied; a switching arrangement for switching connections between the first power source, the charge storage device and the output in each amplifier circuit, wherein each circuit has a first switched configuration in which the charge storage device is charged by the first power source and a second switched configuration in which the charge storage device, once charged, will apply an additional potential difference across the output; the amplifier being configured to vary the amplitude of the RF signal in proportion to the sum of the potential differences applied across the output in each amplifier circuit.
Abstract:
A power detector circuit, comprising a first section configured to receive a radio frequency (RF) input signal and to generate a first voltage, wherein the first voltage comprises a voltage proportional to the sum of a mean-square of the RF input signal and a voltage characteristic of the first section, and wherein the first voltage is an input to a third section, a second section configured to generate a second voltage, wherein the second voltage comprises a combination of an output voltage and a voltage proportional to the voltage characteristic of the first section, wherein the output voltage is proportional to a root-mean-square of the RF input signal, the third section configured to generate the output voltage by combining the first voltage and the second voltage, wherein the second section creates a negative feedback loop for the third section and the output voltage generated by the third section is an output of the power detector circuit.
Abstract:
A protection module (4) for a RF-amplifier (2) is efficient against overvoltage due to load impedance mismatch when said RF-amplifier is connected to a load RF-element (3). The protection module comprises a branch with at least one diode-like operating component (D1, D2,..., Dn) and a resistor (R2) which starts conducting when a RF-signal on a transmission link (6) between the RF-amplifier and the load RF-element is higher than a threshold set by the diode-like operating component. Such protection may be implemented in MOS technology only.
Abstract:
A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.
Abstract:
According to the general concept disclosed herein a circuit for adaptive matching of a load impedance (z load) to a predetermined load-line impedance of a load-line connected to a power amplifier (300) output comprises a fixed matching network (201) between the power transistor and an adaptive matching network (101), whereby the fixed matching network acts as an impedance inverter which results in a relatively low insertion loss at high power. Results indicate that the impedance-inverting network can be used over more than a factor of 10 in impedance variation. Further, the usage of the fixed matching network, close to the power transistor, allows for the implementation of transmission zeros and/or for a well defined load impedance at a predetermined harmonic frequency, independent of the (variable) load impedance at the fundamental frequency.
Abstract:
The invention refers to a power amplifier comprising a first transistor (M1) having a first conducting channel and a second transistor (M2) having a second conducting channel, the first conducting channel being coupled in series with the second conducting channel and further coupled to an output node (2). The power amplifier further comprises a first driver circuit (10) coupled to a first control electrode of the first transistor (M1), a second driver circuit (20) coupled to a second control electrode of the second transistor (M2) and a bootstrap capacitor (C boot ) coupled between the output node (2) and a node (1) of the first driver circuit (10) and a first sensor circuit (40) coupled in parallel to the bootstrap capacitor (C boot ).
Abstract:
The invention relates to a transconductance power amplifier which is capable of correcting load dependency errors where the gain of an amplifier block is finite. A correction impedance (39) is added to a load voltage feedback network. The correction impedance is connected in series with a load (29) and symmetrically with respect to ground. This produces a correction voltage which is proportional to the load current and therefore makes it possible to eliminate the load dependency of the gain, which provides for reduced distortion in cases where the load impedance varies over the frequency range.
Abstract:
A distributed active transformer o a semiconducting substrate is provided. The distributed active transformer includes an outer primary, a secondary disposed adjacent to the outer primary, and an inner primary disposed adjacent to the outer primary and the secondary. A plurality of first three terminal devices is coupled to the outer primary at a plurality of locations. A plurality of second three terminal devices coupled to the inner primary at a plurality of locations, and each second three terminal device is disposed opposite from and coupled to one of the plurality of first three terminal devices. A plurality of power control actuation circuits is also provided, where each power control actuation circuits is also provided, where each power control actuation circuit is coupled to one of the first three terminal devices and the second three terminal devices.