PHASED ARRAY CONTROL CIRCUIT
    1.
    发明申请
    PHASED ARRAY CONTROL CIRCUIT 审中-公开
    相控阵控制电路

    公开(公告)号:WO2018044797A1

    公开(公告)日:2018-03-08

    申请号:PCT/US2017/048913

    申请日:2017-08-28

    Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.

    Abstract translation: 在某些示例性实施例中,寄存器组被用于允许相控阵列系统中的快速波束切换(FBS)。 具体而言,每个波束成形信道与包含M个寄存器组的寄存器组相关联,用于配置波束成形信道的增益/幅度和相位参数等。 所有波束形成通道的寄存器组可以被预先编程,然后快速波束切换电路允许阵列上的所有波束形成通道被切换到基本上同时使用来自其相应寄存器组的相同寄存器组, 相控阵系统可在各种光束模式和方向之间快速切换。 附加地或可替代地,有源功率控制电路可以用于控制提供给一个或多个单独波束成形信道或由一个或多个单独波束成形信道消耗的电功率量,以便减少阵列的DC功率消耗和/或选择性地改变有效方向性 数组。

    SPUR MITIGATION IN A HETERODYNE UPCONVERSION SYSTEM

    公开(公告)号:WO2021026398A2

    公开(公告)日:2021-02-11

    申请号:PCT/US2020/045292

    申请日:2020-08-06

    Abstract: Exemplary embodiments dynamically select the LO frequency and mixer mode (i.e., low-side LO injection or high-side LO injection) for upconversion based on the desired RF output frequency in order to mitigate the effects of spurious and LO leakage signals that could violate radiation emission limits, e.g., in the case where the IF signal frequency is smaller than the RF operating band. By dynamically switching the LO frequency and mixer mode as a function of the requested operating RF channel, low-level emissions and spurious signal compliance with restricted bands can be achieved.

    PHASED ARRAY WITH LOW-LATENCY CONTROL INTERFACE

    公开(公告)号:WO2019173622A1

    公开(公告)日:2019-09-12

    申请号:PCT/US2019/021202

    申请日:2019-03-07

    Abstract: A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam- forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially-sequentially with regard to other beam-forming integrated circuits.

    CALIBRATION OF ACTIVE ELECTRONICALLY STEERED ANTENNAS USING ON-CHIP PROGRAMMING
    6.
    发明申请
    CALIBRATION OF ACTIVE ELECTRONICALLY STEERED ANTENNAS USING ON-CHIP PROGRAMMING 审中-公开
    用片内编程校准有源电子控制天线

    公开(公告)号:WO2018045214A1

    公开(公告)日:2018-03-08

    申请号:PCT/US2017/049699

    申请日:2017-08-31

    Abstract: In some example implementations, there may be provided methods for beamforming calibration of active electronically steered arrays (AESA). In some implementations, one or more adders may generate a phase offset by adding phase calibration data from non-volatile memory and phase command data from static memory, and/or generate a gain offset by adding gain calibration data from the non-volatile memory and gain command data from the static memory. Further, a phase-shift circuit can modify, based on the phase offset, a phase of a first output signal, and an amplitude gain circuit can modify, based on the gain offset, an amplitude of the first output signal. In accordance with these implementations, the modified phase of the first output signal and the modified amplitude of the first output signal are provided to enable pre- calibration of the first output signal and/or a first antenna. Related systems, methods, and articles of manufacture are also described.

    Abstract translation: 在一些示例实现中,可以提供用于有源电子控制阵列(AESA)的波束形成校准的方法。 在一些实现中,一个或多个加法器可以通过添加来自非易失性存储器的相位校准数据和来自静态存储器的相位命令数据来生成相位偏移,和/或通过添加来自非易失性存储器的增益校准数据来生成增益偏移,以及 从静态存储器获得命令数据。 此外,相移电路可以基于相位偏移来修改第一输出信号的相位,并且振幅增益电路可以基于增益偏移来修改第一输出信号的振幅。 根据这些实现方式,提供第一输出信号的修改后的相位和第一输出信号的修改的振幅,以实现第一输出信号和/或第一天线的预校准。 还描述了相关的系统,方法和制造物品。

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