公开(公告)号：WO2017052912A1

公开(公告)日：2017-03-30

申请号：PCT/US2016/048300

申请日：2016-08-24

Applicant: APPLE INC.

Inventor： YANG, Byung Duk ,  HUANG, Chun-Yao ,  KIM, Kyung Wook ,  BENNETT, Patrick B. ,  CHANG, Shih Chang ,  CHOI, Wonjae ,  CHUI, Hao-Lin ,  PARK, Kwang Soon ,  ZHU, Xinyu

IPC: G09G3/20

CPC classification number: G09G5/003 ,  G02F2001/13456 ,  G09G3/20 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2310/0278 ,  G09G2310/0281 ,  G09G2320/0204 ,  G09G2320/0209 ,  G09G2320/0219 ,  G09G2330/021

Abstract: A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.

Abstract translation: 显示装置可以包括向像素提供数据线信号的像素和源极线。 显示装置还可以包括向与像素相关联的开关提供门信号的栅极线。 显示装置还可以包括大致平行于源极线设置并且在交叉点节点处连接到栅极线的垂直栅极线。 显示装置还可以包括补偿线，使得每个补偿线接近相应的垂直栅极线。 补偿线路可以传送与各个门信号相比具有相反极性的补偿信号，以减少或消除多个像素中的至少一个上的反冲电压。

公开(公告)号：WO2017189360A1

公开(公告)日：2017-11-02

申请号：PCT/US2017/028868

申请日：2017-04-21

Applicant: APPLE INC.

Inventor： YANG, Byung Duk ,  KIM, Yong Kwan ,  KIM, Kyung Wook ,  CHANG, Shih Chang

IPC: G02F1/1362 ,  G02F1/136

CPC classification number: H01L27/124 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2001/13629 ,  G02F2201/40 ,  G09G3/3659 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2320/0219

Abstract: Display backplane comprising two pairs of stacked data lines sandwiching pixel electrodes (130), wherein each pair of stacked data lines comprises a lower data line (110) and an upper data line (120) stacked on the lower data line (110), so that the charging time for writing the data signals can be reduced without reducing the pixels' apertures, and wherein the left and right edge (131A, 131B) of each pixel electrode (130) is separated from the respective adjacent lower data line (110) by the same distance so that the parasitic capacitances between the pixel electrode (130) and the two adjacent data lines (110) are substantially equal to each other.

Abstract translation: 显示背板，包括夹着像素电极（130）的两对堆叠的数据线，其中每对堆叠的数据线包括堆叠在该数据线上的下数据线（110）和上数据线（120） 下数据线（110），使得用于写入数据信号的充电时间可以减少而不减少像素的开口，并且其中每个像素电极（130）的左边缘和右边缘（131A，131B）与 各个相邻的下数据线（110）相距相同距离，使得像素电极（130）和两个相邻数据线（110）之间的寄生电容基本上彼此相等。

公开(公告)号：WO2016053722A1

公开(公告)日：2016-04-07

申请号：PCT/US2015/051795

申请日：2015-09-23

Applicant: APPLE INC.

Inventor： CHIU, Hao-lin ,  YANG, Byung Duk ,  HUANG, Chun-yao ,  KIM, Kyung Wook ,  CHANG, Shih Chang ,  LEE, Szu-Hsien

IPC: G09F9/30 ,  G02F1/1345

CPC classification number: G09G3/3648 ,  G02F1/13338 ,  G02F1/134309 ,  G02F1/1345 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13456 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04104 ,  G06F2203/04112 ,  G09F9/30 ,  G09G3/3666 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2310/0281 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/124 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

Abstract translation: 显示器可以具有排列成行和列的像素阵列。 每个像素可以具有用于控制与该像素相关联的输出光量的晶体管。 晶体管可以是具有有源区的薄膜晶体管，第一和第二源极 - 漏极端子和栅极。 栅极线可用于将栅极控制信号分配到每行中的晶体管的栅极。 垂直于栅极线延伸的数据线可用于沿像素列分布图像数据。 栅极线可以连接到平行于数据线延伸的栅极线扩展。 数据线可以各自重叠相应的一个栅极线延伸。 通孔可用于将栅极线延伸部分连接到栅极线。 门线扩展可能都具有相同的长度。

公开(公告)号：WO2013134072A1

公开(公告)日：2013-09-12

申请号：PCT/US2013/028682

申请日：2013-03-01

Applicant: APPLE INC.

Inventor： KIM, Kyung Wook ,  PARK, Young Bae ,  CHANG, Shih Chang ,  HUANG, Chun-Yao ,  ZHONG, John Z.

IPC: G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/134363 ,  G02F2001/13606 ,  G02F2001/136218 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0434

Abstract: A system and device for driving high resolution monitors while reducing artifacts thereon. Utilization of Z-inversion polarity driving techniques to drive pixels in a display reduces power consumption of the display but tends to generate visible horizontal line artifacts caused by capacitances present between the pixels and data lines of the display. By introducing a physical shield between the pixel and data line elements, capacitance therebetween can be reduced, thus eliminating the cause of the horizontal line artifacts. The shield may be a common voltage line (Vcom) of the display.

Abstract translation: 一种用于驱动高分辨率显示器同时减少其上的伪影的系统和装置。 使用Z反转极性驱动技术来驱动显示器中的像素可以降低显示器的功耗，但是倾向于产生由存在于显示器的像素和数据线之间的电容引起的可见的水平线伪影。 通过在像素和数据线元件之间引入物理屏蔽，可以减小它们之间的电容，从而消除水平线伪影的原因。 屏蔽可以是显示器的公共电压线（Vcom）。