公开(公告)号：WO2022031840A1

公开(公告)日：2022-02-10

申请号：PCT/US2021/044531

申请日：2021-08-04

Applicant: APPLE INC.

Inventor： JETER, Robert E. ,  NOTANI, Rakesh L. ,  HSIUNG, Kai Lun ,  MALLADI, Venkata Ramana ,  RANJAN, Rahul ,  KORADA, Naveen Kumar

IPC: G06F13/16 ,  G06F11/1076 ,  G06F13/1689 ,  G11C2207/2254 ,  G11C7/10 ,  G11C7/22

Abstract: A memory subsystem and method for performing calibrations therein is disclosed. A memory subsystem includes a memory controller coupled to a memory by a plurality of signal paths. The memory controller is configured to perform an initial calibration to determine respective eye patterns corresponding to the ones of the plurality of signal paths. For a subsequent calibrations, updated eye patterns are determined for a subset of the plurality of signal paths. Remaining ones of the plurality of signal paths (not included in the subset), are not active during the subsequent calibrations. Updated eye patterns for the remaining ones of the plurality of signal paths are determined based on information obtained during the initial calibration and information from signal paths in the subset designated proxies for the remaining ones of the plurality of signal paths.