VERTICAL INTEGRATED PHOTONICS CHIPLET FOR IN-PACKAGE OPTICAL INTERCONNECT

    公开(公告)号:WO2021087000A1

    公开(公告)日:2021-05-06

    申请号:PCT/US2020/057785

    申请日:2020-10-28

    Abstract: A vertical integrated photonics chiplet assembly includes a package substrate and an external device connected to a top surface of the package substrate. A photonics chip is disposed within the package substrate The photonics chip includes optical coupling devices positioned at a top surface of the photonics chip. A plurality of conductive via structures are disposed within the package substrate in electrical connection with electrical circuits within the photonics chip. The plurality of conductive via structures are electrically connected through the package substrate to the external device. An opening is formed through the top surface of the substrate to expose a portion of the top surface of the photonics chip at which the optical coupling devices are positioned. An optical fiber array is disposed and secured within the opening such that a plurality of optical fibers of the optical fiber array optically couple to the optical coupling devices.

    PLANAR FIBER SHUFFLE
    2.
    发明申请

    公开(公告)号:WO2022115340A1

    公开(公告)日:2022-06-02

    申请号:PCT/US2021/060218

    申请日:2021-11-19

    Applicant: AYAR LABS INC.

    Abstract: A multi-MCP (multi-chip package) module assembly includes a plate, an integrated optical fiber shuffle disposed on the plate, a first MCP disposed on the plate, a second MCP disposed on the plate, a first optical fiber jumper disposed on the plate, and a second optical fiber jumper disposed on the plate. The first optical fiber jumper optically connects the first MCP to the integrated optical fiber shuffle. The second optical fiber jumper optically connects the second MCP to the integrated optical fiber shuffle. The integrated optical fiber shuffle includes an optical network configured to direct optical signals to and from each of the first optical fiber jumper and the second optical fiber jumper.

    MULTI-CHIP PACKAGING OF SILICON PHOTONICS
    3.
    发明申请

    公开(公告)号:WO2021076649A1

    公开(公告)日:2021-04-22

    申请号:PCT/US2020/055613

    申请日:2020-10-14

    Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.

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