Abstract:
Voltage level shifting in a switching output stage is presented. The circuit may include a switching output stage (202) configured to receive an analog input signal and provide a responsive digital output signal, the switching output stage (202) having a first switching device (304) coupled to a first supply voltage (302) and a second switching device (314) coupled to a second supply voltage (310), the first switching device (304) and the second switching device (314) being coupled to a common output node (308). The apparatus may also include a voltage level shifter circuit (210) coupled to a switching control node of the second switching device (314), the voltage level shifter (210) configured to shift a voltage level at the switching control node of the second switching device (314) relative to the analog input signal, wherein the digital output signal at the common output node transitions as the input signal reaches a predetermined threshold value.
Abstract:
Embodiments of apparatuses and methods for proportional feedback for reduced overshoot and undershoot in a switched output are described. An embodiment of an apparatus includes a switching output stage (106) configured to receive an input signal and provide a responsive output signal. The apparatus may also include a pulling circuit coupled (104) to one of the first switching device (306) and the second switching device (308). The pulling circuit (104) may pull a control voltage of power transistors (306, 308) in the switching output stage (106) to reduce impedance of at least one of the transistors (306, 308) in response to a determination that the output signal at the common output node (310) is outside of a predetermined range of a threshold value. Pulling strength may increase as a voltage difference between the output signal and one of the first supply voltage (312) and the second supply voltage (314) increases.
Abstract:
Kickback current from a charge pump to a power management integrated circuit (PMIC) may be reduced by dissipating charge from fly and hold capacitors during mode transitions. A switch may be placed in series between the charge pump and the PMIC to disconnect the charge pump and prevent kickback current from reaching the PMIC. Further, additional loads, as switches, may be coupled to the charge pump outputs to dissipate charge from the fly and hold capacitors. Additionally, a closed feedback loop may be used to monitor and discharge excess charge from the fly and hold capacitors during mode transitions. Furthermore, charge may be redistributed between the fly and hold capacitors during mode transitions to reduce the time period of the transition.