公开(公告)号：WO2017127599A1

公开(公告)日：2017-07-27

申请号：PCT/US2017/014218

申请日：2017-01-20

Applicant: CISCO TECHNOLOGY, INC.

Inventor： BANERJEE, Ayan ,  SIVARAMU, Raghava ,  MEHTA, Ambrish ,  NARAYANAN, Swaminathan ,  SAINI, Shiv ,  MAHAJAN, Mehak

IPC: H04L12/781

CPC classification number: H04L45/741 ,  H04L45/74 ,  H04L45/748 ,  H04L49/10 ,  H04L49/25 ,  H04L49/352 ,  H04L61/6068

Abstract: In one embodiment an approach is provided to efficiently program routes on line cards and fabric modules in a modular router to avoid hot spots and thus avoid undesirable packet loss. Each fabric module includes two separate processors or application specific integrated circuits (ASICs). In another embodiment, each fabric module processor is replaced by a pair of fabric module processors arranged in series with each other, and each processor is responsible for routing only, e.g., IPv4 or IPv6 traffic. The pair of fabric module processors communicates with one another via a trunk line and any packet received at either one of the pair is passed to the other of the pair before being passed back to a line card.

Abstract translation: 在一个实施例中，提供了一种方法来有效地对模块化路由器中的线路卡和结构模块上的路由进行编程，以避免热点并因此避免不希望的分组丢失。 每个光纤模块包含两个独立的处理器或专用集成电路（ASIC）。 在另一个实施例中，每个结构模块处理器被彼此串联布置的一对结构模块处理器所替代，并且每个处理器仅负责路由，例如IPv4或IPv6业务。 这对交换矩阵模块处理器通过中继线相互通信，并且任何一个接收到的数据包在传递回线卡之前都会被传递到另一个数据包。