ASYNCHRONOUS CENTRALIZED MULTI-CHANNEL DMA CONTROLLER
    1.
    发明申请
    ASYNCHRONOUS CENTRALIZED MULTI-CHANNEL DMA CONTROLLER 审中-公开
    异步中心多通道DMA控制器

    公开(公告)号:WO0124015A3

    公开(公告)日:2001-10-25

    申请号:PCT/US0026543

    申请日:2000-09-27

    CPC classification number: G06F13/28 G06F13/4036

    Abstract: An electronic bridging device for transferring electronic data between a first device attached to a system bus and a peripheral device attached to a peripheral bus using a bridging circuit. The DMA controller comprises a system bus interface circuit for connecting the DMA controller to the system bus, a peripheral bus interface circuit for connecting the DMA controller to the peripheral bus, a data transfer request circuit for receiving data transfer requests from devices attached to the peripheral bus, and a control logic circuit for controlling the operation of DMA data transfer operations. Immediately upon receipt of one or more data transfer requests, the bridging device performs the following operations: requests access to the system bus, concatenates all pending peripheral bus data words into a single transfer, and transfers all pending requests across the bridging circuit.

    Abstract translation: 一种电子桥接装置,用于在附接到系统总线的第一装置和使用桥接电路连接到外围总线的外围设备之间传送电子数据。 DMA控制器包括用于将DMA控制器连接到系统总线的系统总线接口电路,用于将DMA控制器连接到外围总线的外围总线接口电路,用于从连接到外围设备的设备接收数据传输请求的数据传输请求电路 总线和用于控制DMA数据传送操作的控制逻辑电路。 在接收到一个或多个数据传输请求之后,桥接设备立即执行以下操作:请求访问系统总线,将所有挂起的外设总线数据字连接成单个传输,并跨桥接电路传输所有未决请求。

    METHOD AND APPARATUS FOR UPSTREAM BURST TRANSMISSION SYNCHRONIZATION IN CABLE MODEMS
    2.
    发明申请
    METHOD AND APPARATUS FOR UPSTREAM BURST TRANSMISSION SYNCHRONIZATION IN CABLE MODEMS 审中-公开
    在电缆调制解调器中上行突发传输同步的方法和装置

    公开(公告)号:WO0128147A3

    公开(公告)日:2001-08-30

    申请号:PCT/US0028010

    申请日:2000-10-09

    CPC classification number: H04N21/8547 H04N21/2389 H04N21/4385

    Abstract: A system for synchronizing the upstream burst transmission in a cable system to a time specified by the cable head end is disclosed. The system includes a free running counter within a cable modem (CM) or network interface unit (NIU), along with logic to capture the value of this free running counter at the time a frame of MPEG-2 SYNC data arrives, to create a time tag stored in memory. A computer within the cable modem or network interface unit has access to the time tags in memory and the contents of a time synchronization message from the head end, also stored in memory. The computer contains a program to calculate the value of the local counter that corresponds to a time to transmit commanded by the cable system head end. The system includes logic within the CM or NIU to initiate an upstream burst transmission when the value of the local counter becomes equal to a calculated value, thus causing the cable modem to initiate its upstream burst transmission precisely at the time commanded by the head end.

    Abstract translation: 公开了一种用于使电缆系统中的上游突发传输与电缆头端所指定的时间同步的系统。 该系统包括在电缆调制解调器(CM)或网络接口单元(NIU)内的自由运行计数器,以及在MPEG-2 SYNC数据帧到达时捕获该自由运行计数器的值的逻辑,以创建 时间标签存储在内存中。 有线调制解调器或网络接口单元内的计算机可以访问存储器中的时间标签以及来自头端的同时存储在存储器中的时间同步消息的内容。 计算机包含一个程序来计算本地计数器的值,该计数器对应于由有线系统前端发送的时间。 当本地计数器的值等于计算值时,系统包括CM或NIU内的逻辑以发起上行突发传输,从而使得线缆调制解调器精确地在头端命令的时间开始其上行突发传输。

Patent Agency Ranking