公开(公告)号：WO2019152461A1

公开(公告)日：2019-08-08

申请号：PCT/US2019/015765

申请日：2019-01-30

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： MARSON, Mark Evan ,  HAMBURG, Michael A.

IPC: G06F12/14 ,  G06F13/36 ,  H04L9/00

Abstract: Systems and methods for protecting cryptographic keys stored in a non-volatile memory. An example method may comprise: storing a device root key in a non-volatile memory; storing a volatile key in a volatile memory; storing a masked cryptographic key in the non-volatile memory, wherein the masked cryptographic key is produced by combining a cryptographic key and the device root key; storing a masked device root key in the non-volatile memory, wherein the masked root key is produced by combining the device root key and the volatile key; and erasing the device root key from the non-volatile memory.

公开(公告)号：WO2022140163A1

公开(公告)日：2022-06-30

申请号：PCT/US2021/063880

申请日：2021-12-16

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： MARSON, Mark Evan ,  HAMBURG, Michael Alexander ,  HANDSCHUH, Helena

IPC: G06F17/16 ,  G06F21/00 ,  G06F21/14 ,  G06N3/02 ,  G06N3/04

Abstract: Aspects of the present disclosure involve implementations that may be used to protect neural network models against adversarial attacks by obfuscating neural network operations and architecture. Obfuscation techniques include obfuscating weights and biases of neural network nodes, obfuscating activation functions used by neural networks, as well as obfuscating neural network architecture by introducing dummy operations, dummy nodes, and dummy layers into the neural networks.

公开(公告)号：WO2015089300A1

公开(公告)日：2015-06-18

申请号：PCT/US2014/069784

申请日：2014-12-11

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： LEISERSON, Andrew John ,  MARSON, Mark Evan ,  WACHS, Megan Anneke

IPC: G06F21/76

CPC classification number: G06F21/72 ,  G06F21/71 ,  G06F21/755 ,  H04L9/003 ,  H04L2209/04 ,  H04L2209/12 ,  H04L2209/16

Abstract: A method of and system for gate-level masking of secret data during a cryptographic process is described. A mask share is determined, wherein a first portion of the mask share includes a first number of zero-values and a second number of one-values, and a second portion of the mask share includes the first number of one-values and the second number of zero-values. Masked data values and the first portion of the mask share are input into a first portion of masked gate logic, and the masked data values and the second portion of the mask share are input into a second portion of the masked gate logic. A first output from the first portion of the masked gate logic and a second output from the second portion of the masked gate logic are identified, wherein either the first output or the second output is a zero-value.

Abstract translation: 描述在密码处理期间秘密数据的门级掩蔽的方法和系统。 确定掩模共享，其中掩模共享的第一部分包括第一数量的零值和第二数量的一值，并且掩模共享的第二部分包括第一数量的一值，第二部分包括第二数量的一值 零值数。 掩蔽数据值和掩模共享的第一部分被输入到屏蔽门逻辑的第一部分中，并且掩蔽的数据值和掩模共享的第二部分被输入到被掩蔽的门逻辑的第二部分。 识别来自屏蔽门逻辑的第一部分的第一输出和来自屏蔽门逻辑的第二部分的第二输出，其中第一输出或第二输出都是零值。

公开(公告)号：WO2023069441A2

公开(公告)日：2023-04-27

申请号：PCT/US2022/047031

申请日：2022-10-18

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： HAMBURG, Michael Alexander ,  ERICKSON, Evan Lawrence ,  HANDSCHUH, Helena ,  MARSON, Mark Evan

IPC: H04L9/30

Abstract: Disclosed systems and techniques involve low-latency multi-key encryption processing in which block keys are precomputed based on multiple cryptographic keys, stored, and then selected for encryption or decryption of data during run-time cryptographic operations. The block keys may be precomputed, for each cryptographic key, in such quantities that allow uninterrupted flow of encryption or decryption operations. Replacement block keys may be concurrently generated to replace the blocks being consumed and authentication values may be computed or updated. Various described techniques allow parallel processing for efficient low-latency block key generation and cryptographic operations.

公开(公告)号：WO2019241007A1

公开(公告)日：2019-12-19

申请号：PCT/US2019/035627

申请日：2019-06-05

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： MARSON, Mark Evan ,  BEST, Scott ,  HANDSCHUH, Helena ,  WU, Winthrop John

IPC: G06F11/30

Abstract: A value corresponding to a physical variation of a device may be received. Furthermore, helper data associated with the physical variation of the device may be received. A result data may be generated based on a combination of the value corresponding to the physical variation of the device and the helper data. An error correction operation may be performed on the result data to identify one or more code words associated with the error correction operation. Subsequently, a target data may be generated based on the one or more code words.

公开(公告)号：WO2016043962A1

公开(公告)日：2016-03-24

申请号：PCT/US2015/047801

申请日：2015-08-31

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： JUN, Benjamin Che-Ming ,  RAWLINGS, William Craig ,  KUMAR, Ambuj ,  MARSON, Mark Evan

IPC: G06F21/71

CPC classification number: G06F3/0637 ,  G06F3/0622 ,  G06F3/0688 ,  G06F21/71 ,  G06F21/76 ,  G11C17/16 ,  G11C17/18

Abstract: A request associated with one or more privileges assigned to a first entity may be received. Each of the one or more privileges may correspond to an operation of an integrated circuit. Information corresponding to the first entity and stored in a memory that is associated with the integrated circuit may be identified. Furthermore, the memory may be programmed to modify the information stored in the memory that is associated with the integrated circuit in response to the request associated with the one or more privileges assigned to the first entity.

Abstract translation: 可以接收与分配给第一实体的一个或多个特权相关联的请求。 一个或多个特权中的每一个可以对应于集成电路的操作。 可以识别与第一实体相对应并存储在与集成电路相关联的存储器中的信息。 此外，存储器可以被编程为响应于与分配给第一实体的一个或多个特权相关联的请求来修改与集成电路相关联的存储器中存储的信息。