DEFECT LOCATION IDENTIFICATION FOR MICRODEVICE MANUFACTURING AND TEST
    2.
    发明申请
    DEFECT LOCATION IDENTIFICATION FOR MICRODEVICE MANUFACTURING AND TEST 审中-公开
    用于MICRODEVICE制造和测试的缺陷位置识别

    公开(公告)号:WO2005111796A2

    公开(公告)日:2005-11-24

    申请号:PCT/US2005/016054

    申请日:2005-05-09

    IPC分类号: G06F9/455

    摘要: A defect identification tool is disclosed that predicts locations at which defects in a microdevice are most likely to occur. The tool may identify both a type of defect and the particular netlists in which that defect is likely to occur. A test circuit generation tool can then subsequently use this defect information to generate a test circuit that tests for the defect in the identified portions of the microcircuit. Similarly, an automatic test pattern generation tool may use the defect location information to generate test data custom-tailored to check for faults corresponding to the identified defect in the specified portions of the microcircuit. Various implementations of the tool may be used both to identify the locations at which defects caused by systematic errors, such as manufacturing process deficiencies or flaws, are most likely to occur and the locations at which randomly-created defects are most likely to occur.

    摘要翻译: 公开了一种缺陷识别工具,其预测微型设备中最有可能发生缺陷的位置。 该工具可以识别缺陷的类型和可能发生缺陷的特定网表。 然后,测试电路生成工具随后可以使用该缺陷信息来生成测试电路,该测试电路测试微电路的识别部分中的缺陷。 类似地,自动测试图形生成工具可以使用缺陷位置信息来生成定制的测试数据,以检查与微电路的指定部分中的所识别的缺陷相对应的故障。 工具的各种实现可以用于识别由系统错误(诸如制造过程缺陷或缺陷)最可能发生的缺陷以及随机创建的缺陷最可能发生的位置的位置。