公开(公告)号：WO2021011314A1

公开(公告)日：2021-01-21

申请号：PCT/US2020/041449

申请日：2020-07-09

Applicant: FACEBOOK TECHNOLOGIES, LLC

Inventor： VENKATESH, Ganesh ,  LAI, Liangzhen ,  CHUANG, Pierce, I-Jen ,  LI, Meng

IPC: G06N3/04 ,  G06N3/063 ,  G06N3/08

Abstract: Disclosed herein includes a system, a method, and a device for receiving input data to generate a plurality of outputs for a layer of a neural network. The plurality of outputs are arranged in a first array. Dimensions of the first array may be compared with dimensions of a processing unit (PE) array including a plurality of PEs. According to a result of the comparing, the first array is partitioned into subarrays by the processor. Each of the subarrays has dimensions less than or equal to the dimensions of the PE array. A first group of PEs in the PE array is assigned to a first one of the subarrays. A corresponding output of the plurality of outputs is generated using a portion of the input data by each PE of the first group of PEs assigned to the first one of the subarrays.

公开(公告)号：WO2021011316A1

公开(公告)日：2021-01-21

申请号：PCT/US2020/041454

申请日：2020-07-09

Applicant: FACEBOOK TECHNOLOGIES, LLC

Inventor： VENKATESH, Ganesh ,  LAI, Liangzhen ,  CHUANG, Pierce, I-Jen ,  LI, Meng ,  CHANDRA, Vikas

IPC: G06F7/544 ,  G06F7/523

Abstract: Disclosed herein includes a system, a method, and a device including shift circuitry and add circuitry for performing multiplication of a first value and a second value for a neural network. The first value has a predetermined format including a first bit, and two or more second bits to represent a value of zero or 2 n where n is an integer greater than or equal to 0. The device shifts, when the two or more second bits represent the value of 2 n , the second value by (n+1) bits via the shift circuitry to provide a first result, selectively outputs zero or the second value, based on a value of the first bit of the first value, to provide a second result, and adds the first result and the second results via the add circuitry to provide a result of the multiplication of the first and second values.

公开(公告)号：WO2021011314A8

公开(公告)日：2021-01-21

申请号：PCT/US2020/041449

申请日：2020-07-09

Applicant: FACEBOOK TECHNOLOGIES, LLC

Inventor： VENKATESH, Ganesh ,  LAI, Liangzhen ,  CHUANG, Pierce, I-Jen ,  LI, Meng

IPC: G06N3/04 ,  G06N3/063 ,  G06N3/08 ,  G06N3/0454

Abstract: Disclosed herein includes a system, a method, and a device for receiving input data to generate a plurality of outputs for a layer of a neural network. The plurality of outputs are arranged in a first array. Dimensions of the first array may be compared with dimensions of a processing unit (PE) array including a plurality of PEs. According to a result of the comparing, the first array is partitioned into subarrays by the processor. Each of the subarrays has dimensions less than or equal to the dimensions of the PE array. A first group of PEs in the PE array is assigned to a first one of the subarrays. A corresponding output of the plurality of outputs is generated using a portion of the input data by each PE of the first group of PEs assigned to the first one of the subarrays.

公开(公告)号：WO2021006965A1

公开(公告)日：2021-01-14

申请号：PCT/US2020/034848

申请日：2020-05-28

Applicant: FACEBOOK TECHNOLOGIES, LLC

Inventor： VENKATESH, Ganesh ,  LAI, Liangzhen ,  CHUANG, Pierce I-Jen ,  LI, Meng

IPC: G06F12/02 ,  G06F12/04 ,  G06N3/063 ,  G06F1/3234 ,  G06F12/0886 ,  G06N3/04 ,  G06F13/16

Abstract: Disclosed herein includes a system, a method, and a device for reading and writing sparse data in a neural network accelerator. A plurality of slices can be established to access a memory having an access size of a data word. A first slice can be configured to access a first side of the data word in memory. Circuitry can access a mask identifying byte positions within the data word having non-zero values. The circuitry can modify the data word to have non-zero byte values stored starting at an end of the first side, and any zero byte values stored in a remainder of the data word. A determination can be made whether a number of non-zero byte values is less than or equal to a first access size of the first slice. The circuitry can write the modified data word to the memory via at least the first slice.