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1.
公开(公告)号:WO2023048827A1
公开(公告)日:2023-03-30
申请号:PCT/US2022/038910
申请日:2022-07-29
Applicant: INTEL CORPORATION
Inventor: HANRAHAN, Niall , POWER, Martin , BRADY, Kevin , GRYMEL, Martin-Thomas , BERNARD, David , BAUGH, Gary , BRICK, Cormac
Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that increase data reuse for multiply and accumulate (MAC) operations. An example apparatus includes a MAC circuit to process a first context of a set of a first type of contexts stored in a first buffer and a first context of a set of a second type of contexts stored in a second buffer. The example apparatus also includes control logic circuitry to, in response to determining that there is an additional context of the second type to be processed in the set of the second type of contexts, maintain the first context of the first type in the first buffer. The control logic circuitry is also to, in response to determining that there is an additional context of the first type to be processed in the set of the first type of contexts maintain the first context of the second type in the second buffer and iterate a pointer of the second buffer from a first position to a next position in the second buffer.
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2.
公开(公告)号:WO2022271235A1
公开(公告)日:2022-12-29
申请号:PCT/US2022/021590
申请日:2022-03-23
Applicant: INTEL CORPORATION
Inventor: POWER, Martin , BRADY, Kevin , HANRAHAN, Niall , GRYMEL, Martin-Thomas , BERNARD, David , BAUGH, Gary
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to perform machine-learning model operations on sparse accelerators. An example apparatus includes first circuitry, second circuitry to generate sparsity data based on an acceleration operation, and third circuitry to instruct one or more data buffers to provide at least one of activation data or weight data based on the sparsity data to the first circuitry, the first circuitry to execute the acceleration operation based on the at least one of the activation data or the weight data.
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