公开(公告)号：WO2018156153A1

公开(公告)日：2018-08-30

申请号：PCT/US2017/019484

申请日：2017-02-24

Applicant: INTEL CORPORATION

Inventor： SRINIVASAN, Vasudevan ,  SISTLA, Krishnakanth V. ,  GOUGH, Corey D. ,  STEINER, Ian M. ,  GUPTA, Nikhil ,  GARG, Vivek ,  VARMA, Ankush ,  VORA, Sujal A. ,  LERNER, David P. ,  SULLIVAN, Joseph M. ,  GURUMOORTHY , Nagasubramanian ,  BOWHILL, William J. ,  RAMAMURTHY , Venkatesh ,  MACNAMARA, Chris ,  BROWNE, John J. ,  DAS, Ripan

IPC: G06F1/32 ,  G06F1/08 ,  G06F9/50

Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.

公开(公告)号：WO2017172028A1

公开(公告)日：2017-10-05

申请号：PCT/US2017/015868

申请日：2017-01-31

Applicant: INTEL CORPORATION

Inventor： CARTAGENA, Daniel G. ,  GOUGH, Corey D. ,  GARG, Vivek ,  GUPTA, Nikhil

IPC: G06F1/20 ,  G06F1/32 ,  G06F9/48

Abstract: A dynamic adjustment of core power can reduce thermal margin between thermal design power (TDP) and an allowable thermal load. For example, by focusing directly on the core temperatures explicitly, a per-core closed loop temperature controller (pCLTC) can remove conservatism induced by the power level 1 policy (PL1, a policy which defines frequency and/or power for the processor under sustained load) thereby allowing for increased processor performance when there exists margin in the thermal system.

Abstract translation: 核心功率的动态调整可降低热设计功率（TDP）与允许的热负载之间的热裕度。 例如，通过明确直接关注核心温度，每个核心闭环温度控制器（pCLTC）可以消除由功率等级1策略（PL1，一种为处理器在持续性条件下定义频率和/或功率的策略）引发的保守性 负载），从而在热系统中存在余量时提高处理器性能。

公开(公告)号：WO2016105731A1

公开(公告)日：2016-06-30

申请号：PCT/US2015/061785

申请日：2015-11-20

Applicant: INTEL CORPORATION

Inventor： GOUGH, Corey D. ,  STEINER, Ian M. ,  SISTLA, Krishnakanth V.

IPC: G06F1/32 ,  G06F13/42

CPC classification number: G06F1/28 ,  G06F13/4282 ,  Y02B70/12 ,  Y02B70/123 ,  Y02D10/14 ,  Y02D10/151

Abstract: A method is provided for controlling a link. This may include determining a condition of a first device coupled to the link, receiving, at the first device, a request for a specific link state from a second device coupled to the link, and determining a power state of the link based on the determined condition of the first device.

Abstract translation: 提供了一种用于控制链接的方法。 这可以包括确定耦合到链路的第一设备的状态，在第一设备处从耦合到链路的第二设备接收对特定链路状态的请求，以及基于所确定的链路来确定链路的功率状态 第一个设备的状态。