POST TESELLATION EDGE CACHE
    1.
    发明申请

    公开(公告)号:WO2013148732A1

    公开(公告)日:2013-10-03

    申请号:PCT/US2013/033944

    申请日:2013-03-26

    CPC classification number: G06T15/005 G06T1/60 G06T17/20

    Abstract: In accordance with some embodiments, domain shader and/or tessellator operations can be eliminated when they are redundant. By using a corner cache, a check can determine whether a given corner, be it a vertex or a quadrilateral corner, has already been evaluated in the domain shader and/or tessellator and if so, the result of the previous operation can be reused instead of performing unnecessary invocations that may increase power consumption or reduce speed.

    Abstract translation: 根据一些实施例,当它们是冗余时,可以消除域着色器和/或细分器操作。 通过使用角落缓存,检查可以确定在域着色器和/或细分器中是否已经评估了一个给定的角点(无论是顶点还是四边形角),如果是,则可以重新使用先前操作的结果 执行可能增加功耗或降低速度的不必要的调用。

    TEMPORALLY AMORTIZED SUPERSAMPLING USING A MIXED PRECISION CONVOLUTIONAL NEURAL NETWORK

    公开(公告)号:WO2023022806A1

    公开(公告)日:2023-02-23

    申请号:PCT/US2022/036112

    申请日:2022-07-05

    Abstract: One embodiment provides a graphics processor comprising a set of processing resources configured to perform a supersampling operation via a mixed precision convolutional neural network, the set of processing resources including circuitry configured to receive, at an input block of a neural network model, history data, velocity data, and current frame data, pre-process the history data, velocity data, and current frame data to generate pre-processed data, provide the pre-processed data to a feature extraction network of the neural network model, process the pre-processed data at the feature extraction network via one or more encoder stages and one or more decoder stages, and generate an output image via an output block of the neural network model via direct reconstruction or kernel prediction.

    REDUCED PRECISION RAY TRAVERSAL WITH PLANE REUSE
    3.
    发明申请
    REDUCED PRECISION RAY TRAVERSAL WITH PLANE REUSE 审中-公开
    用平面重复使用减少了精确射线的行程

    公开(公告)号:WO2017176348A1

    公开(公告)日:2017-10-12

    申请号:PCT/US2017/014865

    申请日:2017-01-25

    CPC classification number: G06T15/06

    Abstract: A method, one or more non-transitory computer readable media, and an apparatus for implementing a reduced precision bounding volume hierarchy ray traversal for graphics processing are disclosed. The method includes the step of reusing, in a child node, a computation for a parent node in a reduced precision bounding volume hierarchy ray traversal for graphics processing. The computational cost of the reduced precision bounding volume hierarchy ray traversal can be reduced by reusing, in the child node, the computation for the parent node.

    Abstract translation: 公开了一种方法,一种或多种非暂时性计算机可读介质以及用于实现用于图形处理的降低精度的包围体层级射线遍历的装置。 该方法包括以下步骤:在子节点中重新使用用于图形处理的精简定界体积分层射线遍历中的父节点的计算。 通过在子节点中重用父节点的计算,可以减少降低的精确包围体层次射线遍历的计算成本。

    JOINT DENOISING AND SUPERSAMPLING OF GRAPHICS DATA

    公开(公告)号:WO2023081565A1

    公开(公告)日:2023-05-11

    申请号:PCT/US2022/077598

    申请日:2022-10-05

    Abstract: Joint denoising and supersampling of graphics data is described. An example of a graphics processor includes multiple processing resources, including a least a first processing resource including a pipeline to perform a supersampling operation; and the pipeline including circuitry to jointly perform denoising and supersampling of received ray tracing input data, the circuitry including first circuitry to receive input data associated with an input block for a neural network, second circuitry to perform operations associated with a feature extraction and kernel prediction network of the neural network, and third circuitry to perform operations associated with a filtering block of the neural network.

    A SORT-BASED TILED DEFERRED SHADING ARCHITECTURE FOR DECOUPLED SAMPLING
    6.
    发明申请
    A SORT-BASED TILED DEFERRED SHADING ARCHITECTURE FOR DECOUPLED SAMPLING 审中-公开
    基于排序的倾斜缩放建筑用于解压缩

    公开(公告)号:WO2013101150A1

    公开(公告)日:2013-07-04

    申请号:PCT/US2011/068023

    申请日:2011-12-30

    CPC classification number: G06T15/80 G06T15/005

    Abstract: A graphics pipeline combines the benefits of decoupling sampling with deferred shading. In the rasterization phase, a shading point is computed for each sample. After rasterization is finished, the shading points are sorted to extract coherence and groups of shading points shaded. This enables high sampling rates with efficient reuse of shading, in addition to other unique benefits.

    Abstract translation: 图形管道结合了去耦采样与延迟着色的优点。 在光栅化阶段,为每个样本计算一个阴影点。 光栅化完成后,对阴影点进行排序,以提取相干性和遮蔽阴影组。 除了其他独特的优点之外,这样可以实现高采样率,同时有效地重用阴影。

    METHOD AND APPARATUS FOR FILTERED COARSE PIXEL SHADING
    8.
    发明申请
    METHOD AND APPARATUS FOR FILTERED COARSE PIXEL SHADING 审中-公开
    滤波器像差图像的方法和装置

    公开(公告)号:WO2016003788A1

    公开(公告)日:2016-01-07

    申请号:PCT/US2015/037874

    申请日:2015-06-26

    CPC classification number: G06T15/80 G06T1/20 G06T15/005 G06T15/04

    Abstract: An apparatus and method for performing coarse pixel shading (CPS). For example, one embodiment of a method comprises: A method for coarse pixel shading (CPS) comprising: pre-processing a graphics mesh by creating a tangent-plane parameterization of desired vertex attributes for each vertex of the mesh; and performing rasterization of the mesh in a rasterization stage of a graphics pipeline using the tangent-plane parameterization.

    Abstract translation: 用于执行粗略像素着色(CPS)的装置和方法。 例如,一种方法的一个实施例包括:一种用于粗略像素着色(CPS)的方法,包括:通过为网格的每个顶点创建所需顶点属性的切平面参数化来预处理图形网格; 以及使用切平面参数化在图形管线的光栅化阶段中执行网格的光栅化。

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