公开(公告)号：WO1997032310A1

公开(公告)日：1997-09-04

申请号：PCT/US1997002565

申请日：1997-02-27

Applicant: MONOLOTHIC SYSTEM TECHNOLOGY, INC.

Inventor： MONOLOTHIC SYSTEM TECHNOLOGY, INC. ,  WINGYU, Leung ,  LIN, Jeffrey, J.

IPC: G11C11/00

CPC classification number: G11C8/08 ,  G11C5/146 ,  G11C11/4085

Abstract: A method and structure (300) for generating a boosted word line voltage for a memory array, such as a DRAM array. To ensure that an adequate voltage is applied to the word line of the memory array during write operations, the word line driver circuit (201) is connected to a boost voltage generator (300) which is boosted to a level which is approximately equal to the Vcc supply voltage plus the threshold voltage of the memory cell pass transistor. A bias voltage generator provides a negative voltage which is used to bias the substrate of the memory array. The boosted voltage generator and the bias voltage generator can be operated in response to the same clock signal used to operate the memory array. A latch-up prevention circuit is provided to ensure that the word line driver circuit does not latch-up during power-on before an adequate boost voltage has been established.

Abstract translation: 一种用于产生诸如DRAM阵列的存储器阵列的升压字线电压的方法和结构（300）。 为了确保在写入操作期间对存储器阵列的字线施加足够的电压，字线驱动电路（201）连接到升压电压发生器（300），升压电压发生器（300）被提升到大约等于 Vcc电源电压加上存储单元传递晶体管的阈值电压。 偏置电压发生器提供用于偏置存储器阵列的衬底的负电压。 升压电压发生器和偏置电压发生器可以响应于用于操作存储器阵列的相同的​​时钟信号而被操作。 提供防闩锁电路以确保在建立足够的升压电压之前，上电时字线驱动电路不会闭锁。