公开(公告)号：WO1993019548A1

公开(公告)日：1993-09-30

申请号：PCT/US1993000413

申请日：1993-01-21

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  LAROSA, Christopher, P. ,  CARNEY, Michael, J. ,  BAKER, James, C.

IPC: H04L07/04

CPC classification number: H04L7/0337

Abstract: The present disclosure includes a discussion of a method of synchronizing a sampling clock signal to a received data signal (131). The clock recovery circuit (127) generates several clock signals (339, 341, 343, 345) at the symbol rate, with each clock signal having a unique phase. To permit fast initial acquisition, the set of clock signals includes a pair of clocks which differ in phase by one-half of a symbol interval. Additionally, the clock recovery circuitry (127) generates error signals (347, 349, 351, 353) representing the difference between the phase of the received data signal and the phase of each clock signal. The error signals (347, 349, 351, 353) are processed over multiple symbol times to determine the optimal sampling phase. The clock recovery circuit (127) then adjusts or maintains the phase of the symbol clock (139) to provide the optimal sampling phase.

公开(公告)号：WO1993019547A1

公开(公告)日：1993-09-30

申请号：PCT/US1993000410

申请日：1993-01-21

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  LAROSA, Christopher, P. ,  CARNEY, Michael, J.

IPC: H04L07/00

CPC classification number: H04L7/0062 ,  H04L7/0083

Abstract: The present disclosure includes a discussion of a method of phase adjustment for use in a clock recovery scheme. The phase adjustment circuit automatically holds the clock phase during periods of poor channel quality. The clock recovery scheme generates a sampling clock signal (139) which is synchronous with the received signal (131). Additionally, the clock recovery scheme generates at least two error signals (347, 349, 351, 353) which indicate the quality of the received signal at different sampling phases. The smallest error signal is referred to as the minimum error value. Each error signal (347, 349, 351, 353) is compared to the minimum error value, creating a corresponding normalized error magnitude signal. Each normalized error magnitude signal is processed to determine the desired phase of the sampling clock signal. Dependent upon the processing of the normalized error magnitude signals, the phase of the sampling clock signal is either shifted or maintained until the next sampling point.

公开(公告)号：WO1994008402A1

公开(公告)日：1994-04-14

申请号：PCT/US1993008789

申请日：1993-09-16

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  LAROSA, Christopher, P. ,  CARNEY, Michael, J.

IPC: H04B03/46

CPC classification number: H04L1/208 ,  H04B1/1027 ,  H04B17/20

Abstract: The present disclosure includes a discussion of a method of and apparatus for channel quality estimation (CQE) (131) in a receiver (111). Each channel is divided into observation intervals and sub-intervals. The duration of the sub-interval is chosen as the largest interval in which the channel is essentially static. The CQE (131) generates error information (129) for each symbol of the sub-interval and collects the error information for a symbol interval forming a sub-interval error value. The CQE (131) maps the sub-interval error value into a sub-interval bit error rate (BER) estimate. The mapping is a non-linear function dependent on the specific radio system. Then, the CQE (131) averages the sub-interval BER estimates over the entire observation interval, forming an interval BER estimate. Finally, the CQE (131) compares the interval BER estimate to a predetermined threshold, forming a channel quality estimation decision for each observation interval.

Abstract translation: 本公开包括对接收机（111）中的信道质量估计（CQE）（131）的方法和装置的讨论。 每个通道分为观察间隔和子间隔。 选择子间隔的持续时间作为信道本质上是静态的最大间隔。 CQE（131）针对子间隔的每个符号生成错误信息（129），并收集形成子间隔误差值的符号间隔的错误信息。 CQE（131）将子间隔误差值映射为子区间误码率（BER）估计。 映射是取决于特定无线电系统的非线性函数。 然后，CQE（131）对整个观测间隔的子区间BER估计进行平均，形成间隔BER估计。 最后，CQE（131）将间隔BER估计与预定阈值进行比较，形成每个观测间隔的信道质量估计决定。

公开(公告)号：WO1993012578A1

公开(公告)日：1993-06-24

申请号：PCT/US1992008689

申请日：1992-10-13

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  LAROSA, Christopher, P. ,  CARNEY, Michael, J.

IPC: H03D03/18

CPC classification number: H04L27/2337 ,  H04L7/0331

Abstract: The present disclosure includes a discussion of a direct phase digitizing apparatus (303) for use in a radiotelephone (101). The direct phase digitizing apparatus (303) accepts a first analog signal (309) having a phase, a voltage range and a first frequency. First, the direct phase digitizer generates an estimated phase map (611) having a second frequency and N-bits of resolution. Second, the direct phase digitizer detects a predetermined-voltage crossing of the first analog signal (409). Third, using the predetermined-voltage crossings, the direct phase digitizer samples the estimated phase map. Fourth, a digital phase signal (623) is generated using the samples of the estimated phase map.

公开(公告)号：WO2005020457A1

公开(公告)日：2005-03-03

申请号：PCT/US2004/024398

申请日：2004-07-28

Applicant: MOTOROLA INC. ,  ZANCHO, Bryan, W. ,  LAROSA, Christopher, P. ,  MALLETTE, Alexandre ,  OLIVER, John, P.

Inventor： ZANCHO, Bryan, W. ,  LAROSA, Christopher, P. ,  MALLETTE, Alexandre ,  OLIVER, John, P.

IPC: H04B1/69

CPC classification number: H04L25/0228 ,  H04B1/7115 ,  H04B1/7117 ,  H04L1/20

Abstract: A method and apparatus for channel estimation in a rake receiver of a CDMA communication system operates with a finite-impulse-response channel estimation filter with L taps and having a fixed delay (40). A pilot sequence of a received sequence of data from a channel of the communication system on the rake receiver is input. A quality of the channel of the communication system is determined using noise or Doppler measurements (46). These measurements are used in adjusting a bandwidth of the filter to accommodate the channel quality while keeping the fixed delay, which minimizes the delay buffer size. The filter is then used to operate on the received sequence of data to provide coherent modulation.

Abstract translation: 用于CDMA通信系统的耙式接收机中的信道估计的方法和装置利用具有L个抽头并具有固定延迟的有限脉冲响应信道估计滤波器（40）来操作。 输入来自rake接收机上的通信系统的信道的接收的数据序列的导频序列。 使用噪声或多普勒测量来确定通信系统的信道质量（46）。 这些测量用于调整滤波器的带宽以适应信道质量，同时保持固定的延迟，这使延迟缓冲器大小最小化。 然后使用滤波器对所接收的数据序列进行操作以提供相干调制。

公开(公告)号：WO1993020633A1

公开(公告)日：1993-10-14

申请号：PCT/US1993000633

申请日：1993-01-25

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  LAROSA, Christopher, P. ,  CARNEY, Michael, J.

IPC: H04L07/00

CPC classification number: H04L7/0062 ,  H04L7/0337 ,  H04L7/042 ,  H04L7/10

Abstract: The present disclosure includes a discussion of a decision-directed clock recovery system which includes circuitry to prevent false-locking and accelerate acquisition on a known symbol patterns. The clock recovery system has at least two control circuits. Each control circuit has an effective bandwidth and also generates a clock signal. The clock recovery system samples the received data signal using at least two clock signals (573, 575), forming a corresponding first and second sampled signal. The sampled signals are used to generate corresponding symbol decisions (581, 583). The symbol decision signals are processed to detect a known symbol pattern in the received data signal (513). Upon detection of the known bit sequence, the characteristics of the clock recovery system are modified, namely, the effective bandwidth of the control circuits are modified (527).

公开(公告)号：WO1993019518A1

公开(公告)日：1993-09-30

申请号：PCT/US1993000412

申请日：1993-01-21

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  LAROSA, Christopher, P. ,  CARNEY, Michael, J.

IPC: H03D01/04

CPC classification number: H03D1/04

Abstract: The present disclosure includes a discussion of a method of compensating for distortion of a received signal's phase. The distortion is caused by the asymmetrical characteristics of a voltage limiter (301). This compensation allows the received signal (115) to be sampled at the positive and negative zero-crossings reducing the requirements of a local oscillator in a radiotelephone system. First, the phase of the received signal is sampled at the positive and negative zero-crossings, forming a corresponding positive-crossing (401) and a negative-crossing (407) phase value for the received signal. Second, the negative-crossing and positive-crossing phase values are combined, forming a first difference signal (409). Third, an estimated error signal (417) is formed using the first difference signal. Fourth, the estimated error signal is combined (419) with the positive or negative zero-crossing phase signals, substantially eliminating the asymmetrical distortion.

公开(公告)号：WO1993012603A1

公开(公告)日：1993-06-24

申请号：PCT/US1992008057

申请日：1992-09-21

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  LAROSA, Christopher, P. ,  CARNEY, Michael, J.

IPC: H04L27/22

CPC classification number: H03D7/00 ,  H03D13/001 ,  H03D2200/005 ,  H03D2200/006 ,  H03D2200/007

Abstract: The present disclosure includes a discussion of a frequency translation apparatus for altering the effective frequency of the phase information of an input signal (115). The input signal (115) has a first phase (Υ(t)) and a first frequency (fi). The phase of the input signal is extracted and digitized at a second frequency (fo), forming a second N-bit digital phase signal (Υ'(t)) (311). The frequency translation apparatus generates a third digital phase signal (319) which approximates the difference between Υ(t) and Υ'(t). Then, the frequency translation apparatus (313) combines the second digital phase signal and the third digital phase signal, forming a fourth digital phase signal (307) substantially approximating the first phase signal.

公开(公告)号：WO1993006668A1

公开(公告)日：1993-04-01

申请号：PCT/US1992007193

申请日：1992-08-26

Applicant: MOTOROLA, INC.

Inventor： MOTOROLA, INC. ,  LAROSA, Christopher, P. ,  CARNEY, Michael, J.

IPC: H04B07/08

CPC classification number: H04B7/0874 ,  H04B7/0802 ,  H04B7/0857 ,  H04B7/0871

Abstract: A phase combining method and apparatus for use in a diversity reception radiotelephone is described. The phase combining method and apparatus is a hybrid diversity technique which combines elements of maximal ratio combining (MRC) and level comparison selection diversity, which results in a simple and effective implementation of a diversity receiver with superior performance. The diversity receiver demodulates the received signals (115, 117), extracts the phase, forming two phase signals (209, 211). Then, the two phase signals (209, 211) are combined to form a third phase signal (213). One of the three phase signals is selected to be used for interpretation of a symbol in the Quadrature Phase Shift Keying (QPSK) constellation. The selection process is based on the received signal strength of the received signals.