Abstract:
Power amplifier (PA) apparatus (300) that includes: a PA device (302) operating at a fundamental frequency and having a maximum operating frequency that is higher than the fundamental frequency, an output current having a fundamental component at the fundamental frequency and a plurality of harmonic components at different harmonic frequencies of the fundamental frequency, and an output voltage based on the output current; a first matching circuit (310) coupled to the PA device and corresponding to the fundamental component; and a second matching circuit (320) coupled between the PA device and the first matching circuit and corresponding to at least one of the harmonic components, wherein the first and second matching circuits maintain the PA output voltage at a value that is no more than a predetermined maximum value, which is less than a breakdown voltage for the PA device.
Abstract:
The application discloses a method and apparatus for adjusting internal load impedances, by section, at feed points present on a distributed amplifier's output transmission line. The method includes determining a summing-point load impedance (Zx) at an off-chip output transmission line of the distributed amplifier. The method further includes determining a driving-point load impedance (Zd) at an output of an on-chip power transistor. The driving-point load impedance diverges and disperses over frequency from that summing-point load impedance due to reactance of at least one on-chip component coupled to the output of the on-chip power transistor. The method then includes determining and providing an offset to summing-point load impedance (Zx) based on the driving-point load impedance (Zd) such that the driving-point load impedance (Zd) converges to the summing-point load impedance (Zx) of that distributed amplifier section.