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公开(公告)号:WO2008054954A3
公开(公告)日:2008-07-03
申请号:PCT/US2007080671
申请日:2007-10-08
申请人: MOTOROLA INC , MANGAT PAWITTER S
发明人: MANGAT PAWITTER S
IPC分类号: B44C1/22
CPC分类号: C03C15/00 , C03C17/34 , C03C2218/33
摘要: A method is provided for patterning monolithically integrated features having a 1:1 ratio. The method comprises forming a first etch barrier layer (18) over a base layer (14) and applying (52) a template (20) to pattern (52) first printed features (26) in the first etch barrier layer (18). The first etch barrier layer (18) is etched (54) to form second printed features (32) in the base layer (14). A second etch barrier layer (34) is formed over the base layer (14) and the template (20) is applied to pattern (58) third printed features (38) in the second etch barrier layer (34). The second etch barrier layer (34) is etched (60) to form fourth printed features (42) in the base layer (14).
摘要翻译: 提供了一种用于图形化具有1:1比例的单片集成特征的方法。 该方法包括在基底层(14)上形成第一蚀刻阻挡层(18),并在第一蚀刻阻挡层(18)中施加(52)模板(20)以图形(52)第一印刷特征(26)。 第一蚀刻阻挡层(18)被蚀刻(54)以在基底层(14)中形成第二印刷特征(32)。 第二蚀刻阻挡层(34)形成在基底层(14)上,并且模板(20)被施加到第二蚀刻阻挡层(34)中的图案(58)第三印刷特征(38)。 第二蚀刻阻挡层(34)被蚀刻(60)以在基底层(14)中形成第四印刷特征(42)。
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公开(公告)号:WO2008054832A2
公开(公告)日:2008-05-08
申请号:PCT/US2007061216
申请日:2007-01-29
CPC分类号: H01L29/0665 , B82Y10/00 , H01L29/0673
摘要: A method (40) for fabricating a nanoscale device, includes nano-imprinting (44) a one dimensional nanostructure (20) on a material (12), forming (46) a patterning layer (22, 26) over the one dimensional nanostructure (20) and the material (12), patterning (48) the patterning layer (22, 26) to differentiate an area over the one dimensional nanostructure (20), and etching (52, 56) the differentiated area and a portion of the material (12) to create a trench (24) under the one dimensional nanostructure (20). The one dimensional nanostructure (20) is coupled to circuitry (30) formed in the material (12).
摘要翻译: 一种用于制造纳米级器件的方法(40)包括在材料(12)上纳米压印(44)一维纳米结构(20),在一维纳米结构上形成(46)图形层(22,26) 20)和所述材料(12),图案化(48)所述图案化层(22,26)以区分所述一维纳米结构(20)上的面积,以及蚀刻(52,56)所述微分区域和所述材料的一部分 (12)在一维纳米结构(20)下方形成沟槽(24)。 一维纳米结构(20)耦合到形成在材料(12)中的电路(30)。
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