公开(公告)号：WO2019055248A1

公开(公告)日：2019-03-21

申请号：PCT/US2018/049423

申请日：2018-09-04

Applicant: NEXTERA VIDEO, INC

Inventor： DEAME, John E. ,  KAUFMANN, Steven ,  VOICU, Liviu

IPC: G06F17/50 ,  H03K19/173

Abstract: Techniques and mechanisms described herein include a signal processor implemented as an overlay on a field-programmable gate array (FPGA) device that utilizes special purpose, hardened intellectual property (IP) modules such as memory blocks and digital signal processing (DSP) cores. A Processing Element (PE) is built from one or more DSP cores connected to additional logic. Interconnected as an array, the PEs may operate in a computational model such as Single Instruction - Multiple Thread (SIMT). A software hierarchy is described that transforms the SIMT array into an effective signal processor.