AUTOMATIC ADJUSTMENT OF BUFFER DEPTH
    1.
    发明申请
    AUTOMATIC ADJUSTMENT OF BUFFER DEPTH 审中-公开
    自动调整缓冲区深度

    公开(公告)号:WO2003007517A1

    公开(公告)日:2003-01-23

    申请号:PCT/US2002/021197

    申请日:2002-07-03

    Abstract: The size of a Jitter Absorption Buffer (JAB) 34 is automatically changed in response to changes in network conditions. The JAB size is changed based on the fullness of the JAB and the recent variations in JAB depth. Automatic adjustment allows for a balance of providing adequate correction for Packet Delay Variation (PDV) while avoiding unnecessary increases in Absolute Packet Delay (APD) from the prolonged use of an oversized JAB. This abstract is provided as a tool for those searching for patents, and not as a limitation on the scope of the claims.

    Abstract translation: 本发明涉及分组通信领域。 更具体地,本发明是一种使用抖动吸收缓冲器来吸收分组到达时间中的传播延迟变化​​的方法和系统。 本发明使用具有两个或更多个位置的有限状态机,例如L(210),M(220),H(230),LR(215),MR(225)和HR(235)。 状态转换基于诸如溢出(3081,3241,352),流(3081,3241,354),半满(316,336,356)或时间到期(328,344)的事件发生。 根据一个实施例,当所测量的延迟变化超过阈值时,缓冲器大小无效地增加,并且当其低于阈值时,缓冲器大小无效地减小。

    MEASUREMENT OF PACKET DELAY VARIATION
    2.
    发明申请
    MEASUREMENT OF PACKET DELAY VARIATION 审中-公开
    分组延迟变化的测量

    公开(公告)号:WO2003010625A2

    公开(公告)日:2003-02-06

    申请号:PCT/US2002/023051

    申请日:2002-07-23

    IPC: G06F

    Abstract: Packet communication systems, or networks, are commonly used for the conveyance of information for data applications. The receive rate of incoming packets varies as congestion in the network causes variation in the amount of time for a packet to traverse the network before being placed into the JAB (Jitter Absorption Buffer). The disclosure contains methods for calculating a real time measurement of PDV (Packet Delay Variation). This real time measurement is useful as a metric on the quality of the service provided by the network or as a trigger for dynamic adjustment of the operation of equipment to optimize for current network conditions. More specifically, the disclosure includes a method that uses variations in the buffer depth of the JAB to measure PDV. This abstract is provided as a tool for those searching for patents, and not as a limitation on the scope of the claims.

    Abstract translation: 分组通信系统或网络通常用于传送数据应用的信息。 传入分组的接收速率随网络中的拥塞引起分组在被放入JAB(抖动吸收缓冲区)之前穿过网络的时间量的变化。 本公开包含用于计算PDV(分组延迟变化)的实时测量的方法。 这种实时测量对于由网络提供的服务质量的度量是有用的,或者作为动态调整设备的操作以便针对当前网络条件进行优化的触发器。 更具体地,本公开包括使用JAB的缓冲器深度的变化来测量PDV的方法。 本摘要作为搜索专利的工具提供,而不是作为对权利要求范围的限制。

    DYNAMIC CONTROL OF A PHASE-LOCKED LOOP
    3.
    发明申请
    DYNAMIC CONTROL OF A PHASE-LOCKED LOOP 审中-公开
    相位锁定环的动态控制

    公开(公告)号:WO2003023967A1

    公开(公告)日:2003-03-20

    申请号:PCT/US2002/029132

    申请日:2002-09-12

    CPC classification number: H03L7/093 H03L7/107

    Abstract: A Phase-locked Loop (PLL) (204) that is dynamically and automatically altered in response to changes in the jitter of the input is disclosed. The Analysis Block (304) receives one or more inputs from the PLL operation. The output of the Analysis Block (304) triggers a change in the Parametric Control Block (308) which in turn imparts changes on the gains of one or more of the various components or the value of ?N of the PLL Low Pass Filter (116). The dynamic change to at least one parameter of the PLL adjusts the tradeoff between removing as much of the jitter as possible and having a responsive system that has a reduced risk of buffer underflow or overflow. This abstract is provided as a tool for those searching for relevant disclosures, and not as a limitation on the scope of the claims.

    Abstract translation: 公开了响应于输入的抖动的变化动态地和自动地改变的锁相环(PLL)(204)。 分析块(304)从PLL操作接收一个或多个输入。 分析块(304)的输出触发参数控制块(308)中的变化,其进而赋予各种分量中的一个或多个的增益的变化或PLL低通滤波器(116)的ΔN的值 )。 对PLL的至少一个参数的动态变化调整了在尽可能多地去除抖动之间的权衡,并具有降低缓冲器下溢或溢出风险的响应系统。 该摘要作为搜索相关披露的工具提供,而不是作为对权利要求范围的限制。

    FLEXIBLE MAPPING OF CIRCUITS INTO PACKETS
    4.
    发明申请
    FLEXIBLE MAPPING OF CIRCUITS INTO PACKETS 审中-公开
    将电路灵活映射到分组中

    公开(公告)号:WO2003012601A2

    公开(公告)日:2003-02-13

    申请号:PCT/US2002/024837

    申请日:2002-07-29

    IPC: G06F

    Abstract: A system for optimally mapping circuits into packets based on round trip delay (RTD), and a system for measuring RTD for use in packet communications systems such as circuit emulation (CEM) systems is disclosed. The measured RTD value can be used in a system that adjusts packet size to reduce capture delay to partially offset an increase in RTD. As the use of smaller packets increases the overhead burden on the packet communication system, the packet size can be increased to reduce the overhead burden when the size of the current RTD becomes appropriately short. The disclosure also teaches the placement of data from two or more circuits destined for the same emulation endpoint into the same transmission packet in order to improve system performance. The abstract is a tool for finding relevant disclosures and not a limitation on the scope of the claims.

    Abstract translation: 公开了一种用于基于往返行程延迟(RTD)将电路最优地映射到分组中的系统,以及用于测量RTD以供在诸如电路仿真(CEM)系统的分组通信系统中使用的系统。 测量的RTD值可用于调整数据包大小以减少捕获延迟以部分抵消RTD增加的系统。 由于使用较小的分组增加了分组通信系统的开销负担,因此当当前RTD的大小变得适当短时,可以增加分组大小以减少开销负担。 本公开还教导了将来自指向相同仿真端点的两个或更多个电路的数据放置到相同的传输分组中,以便改善系统性能。 摘要是查找相关披露的工具,而不是对权利要求范围的限制。

    MEASUREMENT OF PACKET DELAY VARIATION
    5.
    发明申请

    公开(公告)号:WO2003010625A3

    公开(公告)日:2003-02-06

    申请号:PCT/US2002/023051

    申请日:2002-07-23

    Abstract: Packet communication systems, or networks, are commonly used for the conveyance of information for data applications. The receive rate of incoming packets (130) varies as congestion in the network causes variation in the amount of time for a packet to traverse the network before being placed into the JAB (Jitter Absorption Buffer) (100). The disclosure contains methods for calculating a real time measurement of PDV (Packet Delay Variation). This real time measurement is useful as a metric on the quality of the service provided by the network or as a trigger for dynamic adjustment of the operation of equipment to optimize for current network conditions. More specifically, the disclosure includes a method that uses variations in the buffer depth of the JAB to measure PDV.

    USE OF A CIRCULAR BUFFER TO RE-ORDER PACKETS
    6.
    发明申请
    USE OF A CIRCULAR BUFFER TO RE-ORDER PACKETS 审中-公开
    使用循环缓冲器重新订购包装

    公开(公告)号:WO2003007558A1

    公开(公告)日:2003-01-23

    申请号:PCT/US2002/021429

    申请日:2002-07-05

    CPC classification number: H04L47/34 H04L47/32 H04L49/90

    Abstract: A disclosed method and apparatus teaches use of a sequence number in received packets to direct the incoming packets to specific places in the circular buffer 100. This inventive use of sequence number to calculate a write pointer offset 120 allows the packets to be written at the proper place 124 in the circular buffer, regardless of the location of the tail write pointer 108. Within certain limits, a packet that arrives out of sequence is not bound by the position of the tail write pointer 108 to be placed into the circular buffer out of sequence. This abstract is provided to facilitate patent searches, and not as a limitation on the scope of the claims.

    Abstract translation: 所公开的方法和装置教导了在接收到的分组中使用序列号以将输入分组引导到循环缓冲器100中的特定位置。本发明使用序列号来计算写指针偏移120允许分组被写入适当的 位置124在循环缓冲器中,而不管尾部写入指针108的位置如何。在某些限制内,不按顺序到达的分组不受尾部写入指针108的位置的限制,以被放置在循环缓冲器中 序列。 本摘要旨在促进专利检索,而不是对权利要求范围的限制。

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