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    DRIVE FOR CASCODE STACK OF POWER FETS
    1.
    发明申请
    DRIVE FOR CASCODE STACK OF POWER FETS 审中-公开
    驱动电源FET的插座堆栈

    公开(公告)号：WO2016160328A1

    公开(公告)日：2016-10-06

    申请号：PCT/US2016/022506

    申请日：2016-03-15

    Applicant: QUALCOMM INCORPORATED

    Inventor： GUPTA, Vishal ,  YUNG, Chifan ,  DUNCAN, Joseph

    IPC: H03K17/10 ,  H03F3/217

    CPC classification number: H03K19/018507 ,  H03F3/2173 ,  H03F2203/30015 ,  H03F2203/30084 ,  H03F2203/30099 ,  H03F2203/30117 ,  H03F2203/30132 ,  H03K17/102

    Abstract: Disclosed is a cascode configuration that moves the gate of the cascode substantially without delay relative to an output node by capacitively coupling the latter onto the cascode gates. The passive coupling eliminates the need for actively driving the gates of the cascode. In some embodiments, the only circuitry needed on the cascode gate may be a biasing circuit that limits the swing on the cascode gate between V max and 2V max , where V max is a transistor device rating.

    Abstract translation: 公开了一种共源共栅结构，其通过将电容耦合到共源共栅电路上而相对于输出节点基本上没有延迟地移动共源共栅的栅极。 无源耦合消除了积极驱动共源共栅的栅极的需要。 在一些实施例中，级联栅极上所需的唯一电路可以是偏置电路，其限制级联栅极上的Vmax和2Vmax之间的摆幅，其中Vmax是晶体管器件额定值。

    APPLYING FORCE VOLTAGE TO SWITCHING NODE OF DISABLED BUCK CONVERTER POWER STAGE
    2.
    发明申请
    APPLYING FORCE VOLTAGE TO SWITCHING NODE OF DISABLED BUCK CONVERTER POWER STAGE 审中-公开
    施加电压以切换停电转换器电源阶段的节点

    公开(公告)号：WO2016122855A1

    公开(公告)日：2016-08-04

    申请号：PCT/US2016/012607

    申请日：2016-01-08

    Applicant: QUALCOMM INCORPORATED

    Inventor： YUNG, Chi-Fan ,  GUPTA, Vishal ,  DUNCAN, Joseph

    IPC: H02M3/155 ,  H02M1/36 ,  H02M1/32 ,  G01R31/40

    CPC classification number: H02M3/158 ,  G01R31/40 ,  H02M1/32 ,  H02M1/36 ,  H02M3/155

    Abstract: Reliability of a buck power stage may be enhanced by extending the maximum input voltage able to be withstood in the disabled (non-switching) state. During device qualification/testing, a power management unit (PMU) in the disabled state may have its input node subjected to greater than a maximum input voltage permitted for reliability (Vmax). Under such conditions, a force voltage (Vforce) may be selectively applied to the PMU switching node in the disabled state. For a given input voltage (VIN), this reduces voltage across the non-switching transistors of the power stage (and hence the resulting stress) to below Vmax. In certain embodiments, the Vforce applied to the switching node is of a fixed magnitude. In other embodiments, the Vforce applied to the switching node is of a magnitude varying with input voltage. Embodiments may be particularly suited to implement power management for a System-On-Chip (SoC).

    Abstract translation: 降低功率级的可靠性可以通过延长能够在禁用（非切换）状态下承受的最大输入电压来增强。 在设备鉴定/测试期间，处于禁用状态的电源管理单元（PMU）可能使其输入节点受到大于允许可靠性（Vmax）的最大输入电压。 在这种条件下，可以在禁用状态下，将有效电压（Vforce）选择性地施加到PMU交换节点。 对于给定的输入电压（VIN），这会将功率级的非开关晶体管（因此产生的应力）的电压降低到Vmax以下。 在某些实施例中，施加到交换节点的Vforce具有固定的大小。 在其他实施例中，施加到开关节点的Vforce的大小随输入电压而变化。 实施例可以特别适于实现片上系统（SoC）的功率管理。

    IMAGE SIGNAL PROCESSOR FOR PROCESSING IMAGES
    4.
    发明申请
    IMAGE SIGNAL PROCESSOR FOR PROCESSING IMAGES 审中-公开

    公开(公告)号：WO2019074804A1

    公开(公告)日：2019-04-18

    申请号：PCT/US2018/054764

    申请日：2018-10-05

    Applicant: QUALCOMM INCORPORATED

    Inventor： HWANG, Hau ,  PANKAJ, Tushar Sinha ,  GUPTA, Vishal ,  LEE, Jisoo

    IPC: G06T3/40

    Abstract: Techniques and systems are provided for processing image data using one or more neural networks. For example, a patch of raw image data can be obtained. The patch can include a subset of pixels of a frame of raw image data, and the frame can be captured using one or more image sensors. The patch of raw image data includes a single color component for each pixel of the subset of pixels. At least one neural network can be applied to the patch of raw image data to determine a plurality of color component values for one or more pixels of the subset of pixels. A patch of output image data can then be generated based on application of the at least one neural network to the patch of raw image data. The patch of output image data includes a subset of pixels of a frame of output image data, and also includes the plurality of color component values for one or more pixels of the subset of pixels of the frame of output image data. Application of the at least one neural network causes the patch of output image data to include fewer pixels than the patch of raw image data. Multiple patches from the frame can be processed by the at least one neural network in order to generate a final output image. In some cases, the patches from the frame can be overlapping so that the final output image contains a complete picture.

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