UNCERTAINTY AWARE INTERCONNECT DESIGN TO IMPROVE CIRCUIT PERFORMANCE AND/OR YIELD
    1.
    发明申请
    UNCERTAINTY AWARE INTERCONNECT DESIGN TO IMPROVE CIRCUIT PERFORMANCE AND/OR YIELD 审中-公开
    不确定性互连设计,以提高电路性能和/或电流

    公开(公告)号:WO2016182676A1

    公开(公告)日:2016-11-17

    申请号:PCT/US2016/027627

    申请日:2016-04-14

    Abstract: Methods and an apparatus related to generating parameters and guidelines used in the manufacture of semiconductor IC devices are described. A method includes measuring a first oscillating signal (410) produced by a first ring oscillator (404) that includes a first interconnect provided in a first interconnect layer of an IC, selecting a first mode of operation for a second ring oscillator circuit (406, 408) that includes a second interconnect disposed in alignment with the first interconnect, selecting a second mode of operation for the second ring oscillator circuit (406, 408), and determining one or more characteristics of the first interconnect based on a difference in frequency of the first oscillating signal (410) produced when the second ring oscillator circuit is operated in the first mode and frequency of the first oscillating signal (410) when the second ring oscillator circuit is operated in the second mode.

    Abstract translation: 描述了与用于制造半导体IC器件的参数和指导相关的方法和装置。 一种方法包括测量由第一环形振荡器(404)产生的第一振荡信号(410),所述第一振荡信号包括设置在IC的第一互连层中的第一互连,为第二环形振荡器电路选择第一工作模式(406, 408),其包括与所述第一互连对准布置的第二互连,为所述第二环形振荡器电路(406,408)选择第二工作模式,以及基于所述第一互连的频率差来确定所述第一互连的一个或多个特性 当第二环形振荡器电路在第二模式下操作时,当第二环形振荡器电路以第一模式操作时产生的第一振荡信号(410)和第一振荡信号(410)的频率产生。

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