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公开(公告)号:WO2022212254A2
公开(公告)日:2022-10-06
申请号:PCT/US2022/022143
申请日:2022-03-28
Applicant: QUALCOMM INCORPORATED
Inventor: ZHANG, Yan , ZHANG, Zhi , SEREGIN, Vadim , KARCZEWICZ, Marta , CHEN, Chun-Chi
IPC: H04N19/52
Abstract: An example device includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine at least one of a temporal candidate or a history-based candidate and determine at least one non-adjacent candidate, wherein the at least one non-adjacent candidate is from a unit that is not adjacent to a current prediction unit (PU). The one or more processors are configured to determine an advanced motion vector predictor (AMVP) candidate list including the at least one of the temporal candidate or the history-based candidate and the at least one non-adjacent candidate. The at least one non-adjacent candidate is added to the AMVP candidate list after the temporal candidate or before the history-based candidate. The one or more processors are configured to code the current PU based on the AMVP candidate list.
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公开(公告)号:WO2021212014A1
公开(公告)日:2021-10-21
申请号:PCT/US2021/027750
申请日:2021-04-16
Applicant: QUALCOMM INCORPORATED
Inventor: RUSANOVSKYY, Dmytro , ZHANG, Yan , KARCZEWICZ, Marta
IPC: H04N19/117 , H04N19/186 , H04N19/85 , H04N19/98 , H04N19/103 , H04N19/132 , H04N19/136 , H04N19/176 , H04N19/70
Abstract: Systems and techniques are described herein for processing video data. In some examples, a process is described that can include obtaining at least one block of video data and predicting one or more video samples for the at least one block. The process can include obtaining a dynamic range adjustment (DRA) syntax element from the video data. In some cases, the DRA syntax element includes an indication associated with a plurality of DRA modes for the video data. The process can include processing the one or more video samples for the at least one block using a DRA mode based on the indication of the DRA syntax element.
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公开(公告)号:WO2021211887A1
公开(公告)日:2021-10-21
申请号:PCT/US2021/027545
申请日:2021-04-15
Applicant: QUALCOMM INCORPORATED
Inventor: RUSANOVSKYY, Dmytro , ZHANG, Yan , KARCZEWICZ, Marta
IPC: H04N19/70 , H04N19/82 , H04N19/117
Abstract: Systems and techniques are described herein for processing video data. For example, a process can include obtaining a video bitstream, the video bitstream including adaptive loop filter (ALF) data. The process can further include determining a value of an ALF chroma filter signal flag from the ALF data, the value of the ALF chroma filter signal flag indicating whether chroma ALF filter data is signaled in the video bitstream. The process can further include processing at least a portion of a slice of video data based on the value of the ALF chroma filter signal flag.
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公开(公告)号:WO2021141989A1
公开(公告)日:2021-07-15
申请号:PCT/US2021/012310
申请日:2021-01-06
Applicant: QUALCOMM INCORPORATED
Inventor: RUSANOVSKYY, Dmytro , ZHANG, Yan , KARCZEWICZ, Marta
Abstract: An example device for coding video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: determine a size of a dimension of a current block of the video data; calculate a context for entropy coding a last significant coefficient coordinate along the dimension, wherein to calculate the context, the one or more processors are configured to: calculate a context shift value according to ((log2TrafoSize + 1) >> 2) >' represents a bitwise right shift operator, and '
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公开(公告)号:WO2021007547A1
公开(公告)日:2021-01-14
申请号:PCT/US2020/041671
申请日:2020-07-10
Applicant: QUALCOMM INCORPORATED
Inventor: RUSANOVSKYY, Dmytro , ZHANG, Yan
IPC: H04N19/52 , H04N19/157 , H04N19/176
Abstract: An example device for coding video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: determine that a size of a current block of the video data is less than a threshold, the current block being a two-dimensional array of samples representing a portion of a picture; determine a set of motion vector prediction candidates for the current block according to the determination that the size of the current block is less than the threshold; select a motion vector predictor of the motion vector prediction candidates for the current block; code motion information of the current block using the motion vector predictor; and code the current block using the motion information.
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公开(公告)号:WO2023279000A1
公开(公告)日:2023-01-05
申请号:PCT/US2022/073228
申请日:2022-06-28
Applicant: QUALCOMM INCORPORATED
Inventor: CHEN, Chun-Chi , HUANG, Han , HSIEH, Cheng-Teh , CHIEN, Wei-Jung , ZHANG, Zhi , CHANG, Yao-Jen , ZHANG, Yan , SEREGIN, Vadim , KARCZEWICZ, Marta
IPC: H04N19/52 , H04N19/55 , H04N19/56 , H04N19/57 , H04N19/105 , H04N19/132 , H04N19/137 , H04N19/176
Abstract: A device for decoding video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: determine a deterministic bounding box from which to retrieve reference samples of reference pictures of video data for performing decoder-side motion vector derivation (DMVD) for a current block of the video data; derive a motion vector for the current block according to DMVD using the reference samples within the deterministic bounding box; form a prediction block using the motion vector; and decode the current block using the prediction block.
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公开(公告)号:WO2022140338A1
公开(公告)日:2022-06-30
申请号:PCT/US2021/064537
申请日:2021-12-21
Applicant: QUALCOMM INCORPORATED
Inventor: ZHANG, Zhi , HUANG, Han , CHEN, Chun-Chi , ZHANG, Yan , SEREGIN, Vadim , KARCZEWICZ, Marta
IPC: H04N19/533 , H04N19/577 , H04N19/44 , H04N19/56 , H04N19/57
Abstract: Example devices and techniques for multi-pass decoder-side motion vector refinement (DMVR) are disclosed. An example device includes memory configured to store video data and one or more processors coupled to the memory. The one or more processors are configured to apply a multi-pass DMVR to a motion vector for a block of the video data to determine at least one refined motion vector and decode the block based on the at least one refined motion vector. The multi-pass DMVR includes a block-based first pass, a sub-block-based second pass, and a sub-block-based third pass.
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公开(公告)号:WO2022160244A1
公开(公告)日:2022-08-04
申请号:PCT/CN2021/074390
申请日:2021-01-29
Applicant: QUALCOMM INCORPORATED , ZHANG, Nan , WU, Peng , LI, Yuyi , HOU, Yong , GUAN, Mengling , ZHANG, Yan , QIU, Yujie , MA, Jun , TENG, Yueming , MAHESHWARI, Shailesh , XIAO, Gang Andy , DALMIYA, Vishal , CHEN, Xiaochen , RAO, Vaishakh
Inventor: ZHANG, Nan , WU, Peng , LI, Yuyi , HOU, Yong , GUAN, Mengling , ZHANG, Yan , QIU, Yujie , MA, Jun , TENG, Yueming , MAHESHWARI, Shailesh , XIAO, Gang Andy , DALMIYA, Vishal , CHEN, Xiaochen , RAO, Vaishakh
IPC: H04W36/02
Abstract: Methods, systems, and devices for wireless communications are disclosed by the present application. A request to establish a call using a first connection may be received, the first connection using a first radio access technology to communicate with a radio access network. During execution of a procedure to establish the call, a command to handover communications from the first connection to a second connection that uses a second radio access technology to communicate with the radio access network may be received. The second connection may be established in response to the command, and a message indicating that the request to establish the call was successfully received may be transmitted over the second connection. Also, a message indicating that an alert of the call is being issued may be transmitted over the second connection.
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公开(公告)号:WO2022140377A1
公开(公告)日:2022-06-30
申请号:PCT/US2021/064600
申请日:2021-12-21
Applicant: QUALCOMM INCORPORATED
Inventor: ZHANG, Zhi , HUANG, Han , CHEN, Chun-Chi , ZHANG, Yan , SEREGIN, Vadim , KARCZEWICZ, Marta
IPC: H04N19/105 , H04N19/159 , H04N19/176 , H04N19/513 , H04N19/577
Abstract: A method of decoding video data includes determining that bi-directional optical flow (BDOF) is enabled for a block of the video data; dividing the block into a plurality of sub-blocks based on the determination that BDOF is enabled for the block, determining, for each sub-block of one or more sub-blocks of the plurality of sub-blocks, respective distortion values, determining that one of per-pixel BDOF is performed or BDOF is bypassed for each sub-block of the one or more sub-blocks of the plurality of sub-blocks based on the respective distortion values, determining prediction samples for each sub-block of the one or more sub-blocks based on the determination of per-pixel BDOF being performed or BDOF being bypassed, and reconstructing the block based on the prediction samples.
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公开(公告)号:WO2021062401A1
公开(公告)日:2021-04-01
申请号:PCT/US2020/053147
申请日:2020-09-28
Applicant: QUALCOMM INCORPORATED
Inventor: RUSANOVSKYY, Dmytro , KARCZEWICZ, Marta , ZHANG, Yan
IPC: H04N19/70 , H04N19/513 , H04N19/51 , H04N19/54 , H04N19/176
Abstract: Systems, methods, and computer-readable storage media for video coding and compression are described. Some examples include affine coding modes for video coding and compression. One example is an apparatus for coding video data, the apparatus comprising memory and one or more processors coupled to the memory. The one or more processors are configured to obtain a current coding block from the video data, determine control data for the current coding block, and determine one or more affine motion vector clipping parameters from the control data. The one or more processors further select a sample of the current coding block, determine an affine motion vector for the sample of the current coding block, and clip the affine motion vector using the one or more affine motion vector clipping parameters to generate a clipped affine motion vector.
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